[PATCH] D86706: [LLD][PowerPC] Add pc-rel based long branch thunks

[Victor Huang via Phabricator via llvm-commits]

NeHuang added inline comments.


================
Comment at: lld/ELF/Thunks.cpp:993
+
+void PPC64PCRelLongBranchThunk::writeTo(uint8_t *buf) {
+  int64_t offset = in.ppc64LongBranchTarget->getEntryVA(&destination, addend) -
----------------
nemanjai wrote:
> NeHuang wrote:
> > sfertile wrote:
> > > The R12Setup stub calculates the address of the callee relative to the program counter.
> > > 
> > > ```
> > >   writePrefixedInstruction(buf + 0, paddi); // paddi r12, 0, func at pcrel, 1
> > >   write32(buf + 8, MTCTR_R12);              // mtctr r12
> > >   write32(buf + 12, BCTR);                  // bctr
> > > ```
> > > 
> > > The toc-based long branch thunks have to use a table in the data segment because of limited address-ability. The pc-rel instructions and ABI doesn't have the same limitation, so why use the branch linkage table intead of doing the same thing the R12Setup stubs do?
> > Good point! Will update the patch without using branch_lt table. 
> Is it not possible to need a long branch to a destination that isn't available yet? I thought that something like the following would require a long branch to a PLT stub:
> 
> ```
> #include <stdio.h>
> int main(int argc, const char **argv) {
>   int a = argc;
>   printf("a = %d\n", a);
>   asm (".space 134217728");
>   printf("a = %d\n", a);
> }
> ```
> But that seems to create two PLT stubs. Is this something that always happens? Namely, is it always the case that the linker will never create a thunk that goes to another thunk? If so, I think a comment explaining that might be useful.
IIUC we only create a long branch thunk between a caller and callee and we check if there is a valid RelType (R_PPC64_REL14, R_PPC64_REL24, R_PPC64_REL24_NOTOC) in `PPC64::needsThunk` 


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https://reviews.llvm.org/D86706