[PATCH] D86611: GlobalISel: Combine `op undef, x` to 0

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:1858
+  MachineOperand &MO = MI.getOperand(OpIdx);
+  return MO.isReg() &&
+         getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI);
----------------
The isReg check should be unnecessary


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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/combine-shl.mir:15
+    $w0 = COPY %2(s32)
+...
----------------
Also test a vector?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86611/new/

https://reviews.llvm.org/D86611