[llvm] 5a15f66 - GlobalISel: Implement fewerElementsVector for G_INSERT_VECTOR_ELT
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 18 10:51:26 PDT 2020
Author: Matt Arsenault
Date: 2020-08-18T13:51:19-04:00
New Revision: 5a15f6628efcb583e1cca1fdc57d7e64f5f665da
URL: https://github.com/llvm/llvm-project/commit/5a15f6628efcb583e1cca1fdc57d7e64f5f665da
DIFF: https://github.com/llvm/llvm-project/commit/5a15f6628efcb583e1cca1fdc57d7e64f5f665da.diff
LOG: GlobalISel: Implement fewerElementsVector for G_INSERT_VECTOR_ELT
Add unit tests since AMDGPU will only trigger this for gigantic
vectors, and won't use the annoying odd sized breakdown case.
Added:
llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
Modified:
llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
index e1295f66c298..d0e7419ec812 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
@@ -279,9 +279,9 @@ class LegalizerHelper {
LegalizeResult fewerElementsVectorBuildVector(MachineInstr &MI,
unsigned TypeIdx,
LLT NarrowTy);
- LegalizeResult fewerElementsVectorExtractVectorElt(MachineInstr &MI,
- unsigned TypeIdx,
- LLT NarrowTy);
+ LegalizeResult fewerElementsVectorExtractInsertVectorElt(MachineInstr &MI,
+ unsigned TypeIdx,
+ LLT NarrowTy);
LegalizeResult
reduceLoadStoreWidth(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 841c37ec7a3e..2f722d04a697 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -3608,18 +3608,24 @@ LegalizerHelper::fewerElementsVectorBuildVector(MachineInstr &MI,
}
LegalizerHelper::LegalizeResult
-LegalizerHelper::fewerElementsVectorExtractVectorElt(MachineInstr &MI,
- unsigned TypeIdx,
- LLT NarrowVecTy) {
- assert(TypeIdx == 1 && "not a vector type index");
+LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(MachineInstr &MI,
+ unsigned TypeIdx,
+ LLT NarrowVecTy) {
+ Register DstReg = MI.getOperand(0).getReg();
+ Register SrcVec = MI.getOperand(1).getReg();
+ Register InsertVal;
+ bool IsInsert = MI.getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT;
+
+ assert((IsInsert ? TypeIdx == 0 : TypeIdx == 1) && "not a vector type index");
+ if (IsInsert)
+ InsertVal = MI.getOperand(2).getReg();
+
+ Register Idx = MI.getOperand(MI.getNumOperands() - 1).getReg();
// TODO: Handle total scalarization case.
if (!NarrowVecTy.isVector())
return UnableToLegalize;
- Register DstReg = MI.getOperand(0).getReg();
- Register SrcVec = MI.getOperand(1).getReg();
- Register Idx = MI.getOperand(2).getReg();
LLT VecTy = MRI.getType(SrcVec);
// If the index is a constant, we can really break this down as you would
@@ -3637,8 +3643,8 @@ LegalizerHelper::fewerElementsVectorExtractVectorElt(MachineInstr &MI,
LLT GCDTy = extractGCDType(VecParts, VecTy, NarrowVecTy, SrcVec);
// Build a sequence of NarrowTy pieces in VecParts for this operand.
- buildLCMMergePieces(VecTy, NarrowVecTy, GCDTy, VecParts,
- TargetOpcode::G_ANYEXT);
+ LLT LCMTy = buildLCMMergePieces(VecTy, NarrowVecTy, GCDTy, VecParts,
+ TargetOpcode::G_ANYEXT);
unsigned NewNumElts = NarrowVecTy.getNumElements();
@@ -3647,12 +3653,26 @@ LegalizerHelper::fewerElementsVectorExtractVectorElt(MachineInstr &MI,
auto NewIdx =
MIRBuilder.buildConstant(IdxTy, IdxVal - NewNumElts * PartIdx);
- MIRBuilder.buildExtractVectorElement(DstReg, VecParts[PartIdx], NewIdx);
+ if (IsInsert) {
+ LLT PartTy = MRI.getType(VecParts[PartIdx]);
+
+ // Use the adjusted index to insert into one of the subvectors.
+ auto InsertPart = MIRBuilder.buildInsertVectorElement(
+ PartTy, VecParts[PartIdx], InsertVal, NewIdx);
+ VecParts[PartIdx] = InsertPart.getReg(0);
+
+ // Recombine the inserted subvector with the others to reform the result
+ // vector.
+ buildWidenedRemergeToDst(DstReg, LCMTy, VecParts);
+ } else {
+ MIRBuilder.buildExtractVectorElement(DstReg, VecParts[PartIdx], NewIdx);
+ }
+
MI.eraseFromParent();
return Legalized;
}
- // With a variable index, we can't perform the extract in a smaller type, so
+ // With a variable index, we can't perform the operation in a smaller type, so
// we're forced to expand this.
//
// TODO: We could emit a chain of compare/select to figure out which piece to
@@ -3992,7 +4012,8 @@ LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
case G_BUILD_VECTOR:
return fewerElementsVectorBuildVector(MI, TypeIdx, NarrowTy);
case G_EXTRACT_VECTOR_ELT:
- return fewerElementsVectorExtractVectorElt(MI, TypeIdx, NarrowTy);
+ case G_INSERT_VECTOR_ELT:
+ return fewerElementsVectorExtractInsertVectorElt(MI, TypeIdx, NarrowTy);
case G_LOAD:
case G_STORE:
return reduceLoadStoreWidth(MI, TypeIdx, NarrowTy);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 28fbc3ec59e7..4c3adb108031 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -1359,7 +1359,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
.clampScalar(EltTypeIdx, S32, S64)
.clampScalar(VecTypeIdx, S32, S64)
.clampScalar(IdxTypeIdx, S32, S32)
- .clampMaxNumElements(1, S32, 32)
+ .clampMaxNumElements(VecTypeIdx, S32, 32)
// TODO: Clamp elements for 64-bit vectors?
// It should only be necessary with variable indexes.
// As a last resort, lower to the stack
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
new file mode 100644
index 000000000000..5d1468eba04e
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
@@ -0,0 +1,137 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
+
+define amdgpu_kernel void @v_insert_v64i32_37(<64 x i32> addrspace(1)* %ptr.in, <64 x i32> addrspace(1)* %ptr.out) #0 {
+; GCN-LABEL: v_insert_v64i32_37:
+; GCN: ; %bb.0:
+; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
+; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0
+; GCN-NEXT: v_lshlrev_b64 v[0:1], 8, v[0:1]
+; GCN-NEXT: s_waitcnt lgkmcnt(0)
+; GCN-NEXT: v_mov_b32_e32 v3, s1
+; GCN-NEXT: v_mov_b32_e32 v2, s0
+; GCN-NEXT: v_add_co_u32_e32 v8, vcc, v2, v0
+; GCN-NEXT: s_mov_b32 s1, 0
+; GCN-NEXT: v_addc_co_u32_e32 v9, vcc, v3, v1, vcc
+; GCN-NEXT: s_movk_i32 s0, 0x80
+; GCN-NEXT: v_mov_b32_e32 v3, s1
+; GCN-NEXT: v_mov_b32_e32 v2, s0
+; GCN-NEXT: v_add_co_u32_e32 v12, vcc, v8, v2
+; GCN-NEXT: s_movk_i32 s0, 0xc0
+; GCN-NEXT: v_mov_b32_e32 v65, s1
+; GCN-NEXT: v_mov_b32_e32 v5, s3
+; GCN-NEXT: v_mov_b32_e32 v64, s0
+; GCN-NEXT: s_movk_i32 s0, 0x50
+; GCN-NEXT: v_mov_b32_e32 v69, s1
+; GCN-NEXT: v_addc_co_u32_e32 v13, vcc, v9, v3, vcc
+; GCN-NEXT: v_mov_b32_e32 v4, s2
+; GCN-NEXT: v_add_co_u32_e32 v66, vcc, v4, v0
+; GCN-NEXT: v_mov_b32_e32 v68, s0
+; GCN-NEXT: s_movk_i32 s0, 0x60
+; GCN-NEXT: v_mov_b32_e32 v71, s1
+; GCN-NEXT: v_addc_co_u32_e32 v67, vcc, v5, v1, vcc
+; GCN-NEXT: v_mov_b32_e32 v70, s0
+; GCN-NEXT: s_movk_i32 s0, 0x70
+; GCN-NEXT: v_mov_b32_e32 v73, s1
+; GCN-NEXT: v_add_co_u32_e32 v74, vcc, v66, v2
+; GCN-NEXT: v_mov_b32_e32 v72, s0
+; GCN-NEXT: s_movk_i32 s0, 0x90
+; GCN-NEXT: v_mov_b32_e32 v0, s0
+; GCN-NEXT: v_addc_co_u32_e32 v75, vcc, v67, v3, vcc
+; GCN-NEXT: v_mov_b32_e32 v1, s1
+; GCN-NEXT: v_add_co_u32_e32 v76, vcc, v66, v0
+; GCN-NEXT: v_addc_co_u32_e32 v77, vcc, v67, v1, vcc
+; GCN-NEXT: global_load_dwordx4 v[4:7], v[12:13], off offset:16
+; GCN-NEXT: global_load_dwordx4 v[0:3], v[12:13], off
+; GCN-NEXT: v_add_co_u32_e32 v10, vcc, 64, v8
+; GCN-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v9, vcc
+; GCN-NEXT: v_add_co_u32_e32 v28, vcc, v8, v64
+; GCN-NEXT: v_addc_co_u32_e32 v29, vcc, v9, v65, vcc
+; GCN-NEXT: global_load_dwordx4 v[32:35], v[8:9], off
+; GCN-NEXT: global_load_dwordx4 v[36:39], v[8:9], off offset:16
+; GCN-NEXT: global_load_dwordx4 v[40:43], v[8:9], off offset:32
+; GCN-NEXT: global_load_dwordx4 v[44:47], v[8:9], off offset:48
+; GCN-NEXT: global_load_dwordx4 v[48:51], v[10:11], off
+; GCN-NEXT: global_load_dwordx4 v[52:55], v[10:11], off offset:16
+; GCN-NEXT: global_load_dwordx4 v[56:59], v[10:11], off offset:32
+; GCN-NEXT: global_load_dwordx4 v[60:63], v[10:11], off offset:48
+; GCN-NEXT: global_load_dwordx4 v[8:11], v[12:13], off offset:32
+; GCN-NEXT: global_load_dwordx4 v[12:15], v[12:13], off offset:48
+; GCN-NEXT: global_load_dwordx4 v[16:19], v[28:29], off
+; GCN-NEXT: global_load_dwordx4 v[20:23], v[28:29], off offset:16
+; GCN-NEXT: global_load_dwordx4 v[24:27], v[28:29], off offset:32
+; GCN-NEXT: global_load_dwordx4 v[28:31], v[28:29], off offset:48
+; GCN-NEXT: s_movk_i32 s0, 0xa0
+; GCN-NEXT: s_waitcnt vmcnt(15)
+; GCN-NEXT: v_mov_b32_e32 v5, 0x3e7
+; GCN-NEXT: s_waitcnt vmcnt(14)
+; GCN-NEXT: global_store_dwordx4 v[74:75], v[0:3], off
+; GCN-NEXT: global_store_dwordx4 v[76:77], v[4:7], off
+; GCN-NEXT: v_mov_b32_e32 v0, s0
+; GCN-NEXT: v_mov_b32_e32 v1, s1
+; GCN-NEXT: v_add_co_u32_e32 v0, vcc, v66, v0
+; GCN-NEXT: s_movk_i32 s0, 0xb0
+; GCN-NEXT: v_mov_b32_e32 v3, s1
+; GCN-NEXT: v_mov_b32_e32 v2, s0
+; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, v67, v1, vcc
+; GCN-NEXT: v_add_co_u32_e32 v2, vcc, v66, v2
+; GCN-NEXT: v_addc_co_u32_e32 v3, vcc, v67, v3, vcc
+; GCN-NEXT: s_waitcnt vmcnt(7)
+; GCN-NEXT: global_store_dwordx4 v[0:1], v[8:11], off
+; GCN-NEXT: s_waitcnt vmcnt(7)
+; GCN-NEXT: global_store_dwordx4 v[2:3], v[12:15], off
+; GCN-NEXT: v_add_co_u32_e32 v0, vcc, v66, v64
+; GCN-NEXT: s_movk_i32 s0, 0xd0
+; GCN-NEXT: v_mov_b32_e32 v3, s1
+; GCN-NEXT: v_mov_b32_e32 v2, s0
+; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, v67, v65, vcc
+; GCN-NEXT: v_add_co_u32_e32 v2, vcc, v66, v2
+; GCN-NEXT: s_movk_i32 s0, 0xe0
+; GCN-NEXT: v_addc_co_u32_e32 v3, vcc, v67, v3, vcc
+; GCN-NEXT: s_waitcnt vmcnt(7)
+; GCN-NEXT: global_store_dwordx4 v[0:1], v[16:19], off
+; GCN-NEXT: s_waitcnt vmcnt(7)
+; GCN-NEXT: global_store_dwordx4 v[2:3], v[20:23], off
+; GCN-NEXT: v_mov_b32_e32 v0, s0
+; GCN-NEXT: v_mov_b32_e32 v1, s1
+; GCN-NEXT: v_add_co_u32_e32 v0, vcc, v66, v0
+; GCN-NEXT: s_movk_i32 s0, 0xf0
+; GCN-NEXT: v_mov_b32_e32 v3, s1
+; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, v67, v1, vcc
+; GCN-NEXT: v_mov_b32_e32 v2, s0
+; GCN-NEXT: v_add_co_u32_e32 v2, vcc, v66, v2
+; GCN-NEXT: v_addc_co_u32_e32 v3, vcc, v67, v3, vcc
+; GCN-NEXT: s_waitcnt vmcnt(7)
+; GCN-NEXT: global_store_dwordx4 v[0:1], v[24:27], off
+; GCN-NEXT: s_waitcnt vmcnt(7)
+; GCN-NEXT: global_store_dwordx4 v[2:3], v[28:31], off
+; GCN-NEXT: v_add_co_u32_e32 v0, vcc, 64, v66
+; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v67, vcc
+; GCN-NEXT: global_store_dwordx4 v[0:1], v[36:39], off offset:-48
+; GCN-NEXT: global_store_dwordx4 v[0:1], v[40:43], off offset:-32
+; GCN-NEXT: global_store_dwordx4 v[0:1], v[44:47], off offset:-16
+; GCN-NEXT: global_store_dwordx4 v[0:1], v[48:51], off
+; GCN-NEXT: v_add_co_u32_e32 v0, vcc, v66, v68
+; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, v67, v69, vcc
+; GCN-NEXT: global_store_dwordx4 v[66:67], v[32:35], off
+; GCN-NEXT: global_store_dwordx4 v[0:1], v[52:55], off
+; GCN-NEXT: v_add_co_u32_e32 v0, vcc, v66, v70
+; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, v67, v71, vcc
+; GCN-NEXT: v_add_co_u32_e32 v2, vcc, v66, v72
+; GCN-NEXT: v_addc_co_u32_e32 v3, vcc, v67, v73, vcc
+; GCN-NEXT: global_store_dwordx4 v[0:1], v[56:59], off
+; GCN-NEXT: global_store_dwordx4 v[2:3], v[60:63], off
+; GCN-NEXT: s_endpgm
+ %id = call i32 @llvm.amdgcn.workitem.id.x()
+ %gep.in = getelementptr <64 x i32>, <64 x i32> addrspace(1)* %ptr.in, i32 %id
+ %vec = load <64 x i32>, <64 x i32> addrspace(1)* %gep.in
+ %insert = insertelement <64 x i32> %vec, i32 999, i32 37
+ %gep.out = getelementptr <64 x i32>, <64 x i32> addrspace(1)* %ptr.out, i32 %id
+ store <64 x i32> %insert, <64 x i32> addrspace(1)* %gep.out
+ ret void
+}
+
+declare i32 @llvm.amdgcn.workitem.id.x() #1
+
+attributes #0 = { "amdgpu-waves-per-eu"="1,10" }
+attributes #1 = { nounwind readnone speculatable willreturn }
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
index 3f3ec6216585..6d0d24e2373e 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
@@ -190,712 +190,94 @@ body: |
; CHECK-LABEL: name: insert_vector_elt_64_65_v64s32
; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $sgpr0_sgpr1
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
- ; CHECK: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p1) :: (load 64, align 4, addrspace 4)
- ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)
- ; CHECK: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load 64 + 64, align 4, addrspace 4)
- ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 128
- ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64)
- ; CHECK: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load 64 + 128, align 4, addrspace 4)
- ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 192
- ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64)
- ; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 + 192, align 4, addrspace 4)
- ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 12345
- ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.1
- ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>)
- ; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<16 x s32>)
- ; CHECK: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32), [[UV40:%[0-9]+]]:_(s32), [[UV41:%[0-9]+]]:_(s32), [[UV42:%[0-9]+]]:_(s32), [[UV43:%[0-9]+]]:_(s32), [[UV44:%[0-9]+]]:_(s32), [[UV45:%[0-9]+]]:_(s32), [[UV46:%[0-9]+]]:_(s32), [[UV47:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD2]](<16 x s32>)
- ; CHECK: [[UV48:%[0-9]+]]:_(s32), [[UV49:%[0-9]+]]:_(s32), [[UV50:%[0-9]+]]:_(s32), [[UV51:%[0-9]+]]:_(s32), [[UV52:%[0-9]+]]:_(s32), [[UV53:%[0-9]+]]:_(s32), [[UV54:%[0-9]+]]:_(s32), [[UV55:%[0-9]+]]:_(s32), [[UV56:%[0-9]+]]:_(s32), [[UV57:%[0-9]+]]:_(s32), [[UV58:%[0-9]+]]:_(s32), [[UV59:%[0-9]+]]:_(s32), [[UV60:%[0-9]+]]:_(s32), [[UV61:%[0-9]+]]:_(s32), [[UV62:%[0-9]+]]:_(s32), [[UV63:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD3]](<16 x s32>)
- ; CHECK: G_STORE [[UV]](s32), [[FRAME_INDEX]](p5) :: (store 4 into %stack.1, align 256, addrspace 5)
- ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C5]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(p5) = COPY [[PTR_ADD3]](p5)
- ; CHECK: G_STORE [[UV1]](s32), [[COPY1]](p5) :: (store 4 into %stack.1 + 4, align 256, addrspace 5)
- ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
- ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C6]](s32)
- ; CHECK: [[COPY2:%[0-9]+]]:_(p5) = COPY [[PTR_ADD4]](p5)
- ; CHECK: G_STORE [[UV2]](s32), [[COPY2]](p5) :: (store 4 into %stack.1 + 8, align 256, addrspace 5)
- ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
- ; CHECK: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C7]](s32)
- ; CHECK: [[COPY3:%[0-9]+]]:_(p5) = COPY [[PTR_ADD5]](p5)
- ; CHECK: G_STORE [[UV3]](s32), [[COPY3]](p5) :: (store 4 into %stack.1 + 12, align 256, addrspace 5)
- ; CHECK: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
- ; CHECK: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C8]](s32)
- ; CHECK: [[COPY4:%[0-9]+]]:_(p5) = COPY [[PTR_ADD6]](p5)
- ; CHECK: G_STORE [[UV4]](s32), [[COPY4]](p5) :: (store 4 into %stack.1 + 16, align 256, addrspace 5)
- ; CHECK: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
- ; CHECK: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C9]](s32)
- ; CHECK: [[COPY5:%[0-9]+]]:_(p5) = COPY [[PTR_ADD7]](p5)
- ; CHECK: G_STORE [[UV5]](s32), [[COPY5]](p5) :: (store 4 into %stack.1 + 20, align 256, addrspace 5)
- ; CHECK: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
- ; CHECK: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C10]](s32)
- ; CHECK: [[COPY6:%[0-9]+]]:_(p5) = COPY [[PTR_ADD8]](p5)
- ; CHECK: G_STORE [[UV6]](s32), [[COPY6]](p5) :: (store 4 into %stack.1 + 24, align 256, addrspace 5)
- ; CHECK: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
- ; CHECK: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C11]](s32)
- ; CHECK: [[COPY7:%[0-9]+]]:_(p5) = COPY [[PTR_ADD9]](p5)
- ; CHECK: G_STORE [[UV7]](s32), [[COPY7]](p5) :: (store 4 into %stack.1 + 28, align 256, addrspace 5)
- ; CHECK: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C12]](s32)
- ; CHECK: [[COPY8:%[0-9]+]]:_(p5) = COPY [[PTR_ADD10]](p5)
- ; CHECK: G_STORE [[UV8]](s32), [[COPY8]](p5) :: (store 4 into %stack.1 + 32, align 256, addrspace 5)
- ; CHECK: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 36
- ; CHECK: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C13]](s32)
- ; CHECK: [[COPY9:%[0-9]+]]:_(p5) = COPY [[PTR_ADD11]](p5)
- ; CHECK: G_STORE [[UV9]](s32), [[COPY9]](p5) :: (store 4 into %stack.1 + 36, align 256, addrspace 5)
- ; CHECK: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 40
- ; CHECK: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C14]](s32)
- ; CHECK: [[COPY10:%[0-9]+]]:_(p5) = COPY [[PTR_ADD12]](p5)
- ; CHECK: G_STORE [[UV10]](s32), [[COPY10]](p5) :: (store 4 into %stack.1 + 40, align 256, addrspace 5)
- ; CHECK: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 44
- ; CHECK: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C15]](s32)
- ; CHECK: [[COPY11:%[0-9]+]]:_(p5) = COPY [[PTR_ADD13]](p5)
- ; CHECK: G_STORE [[UV11]](s32), [[COPY11]](p5) :: (store 4 into %stack.1 + 44, align 256, addrspace 5)
- ; CHECK: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 48
- ; CHECK: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C16]](s32)
- ; CHECK: [[COPY12:%[0-9]+]]:_(p5) = COPY [[PTR_ADD14]](p5)
- ; CHECK: G_STORE [[UV12]](s32), [[COPY12]](p5) :: (store 4 into %stack.1 + 48, align 256, addrspace 5)
- ; CHECK: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 52
- ; CHECK: [[PTR_ADD15:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C17]](s32)
- ; CHECK: [[COPY13:%[0-9]+]]:_(p5) = COPY [[PTR_ADD15]](p5)
- ; CHECK: G_STORE [[UV13]](s32), [[COPY13]](p5) :: (store 4 into %stack.1 + 52, align 256, addrspace 5)
- ; CHECK: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 56
- ; CHECK: [[PTR_ADD16:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C18]](s32)
- ; CHECK: [[COPY14:%[0-9]+]]:_(p5) = COPY [[PTR_ADD16]](p5)
- ; CHECK: G_STORE [[UV14]](s32), [[COPY14]](p5) :: (store 4 into %stack.1 + 56, align 256, addrspace 5)
- ; CHECK: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 60
- ; CHECK: [[PTR_ADD17:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C19]](s32)
- ; CHECK: [[COPY15:%[0-9]+]]:_(p5) = COPY [[PTR_ADD17]](p5)
- ; CHECK: G_STORE [[UV15]](s32), [[COPY15]](p5) :: (store 4 into %stack.1 + 60, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD18:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)
- ; CHECK: [[COPY16:%[0-9]+]]:_(p5) = COPY [[PTR_ADD18]](p5)
- ; CHECK: G_STORE [[UV16]](s32), [[COPY16]](p5) :: (store 4 into %stack.1 + 64, align 256, addrspace 5)
- ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 68
- ; CHECK: [[PTR_ADD19:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C20]](s32)
- ; CHECK: [[COPY17:%[0-9]+]]:_(p5) = COPY [[PTR_ADD19]](p5)
- ; CHECK: G_STORE [[UV17]](s32), [[COPY17]](p5) :: (store 4 into %stack.1 + 68, align 256, addrspace 5)
- ; CHECK: [[C21:%[0-9]+]]:_(s32) = G_CONSTANT i32 72
- ; CHECK: [[PTR_ADD20:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C21]](s32)
- ; CHECK: [[COPY18:%[0-9]+]]:_(p5) = COPY [[PTR_ADD20]](p5)
- ; CHECK: G_STORE [[UV18]](s32), [[COPY18]](p5) :: (store 4 into %stack.1 + 72, align 256, addrspace 5)
- ; CHECK: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 76
- ; CHECK: [[PTR_ADD21:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C22]](s32)
- ; CHECK: [[COPY19:%[0-9]+]]:_(p5) = COPY [[PTR_ADD21]](p5)
- ; CHECK: G_STORE [[UV19]](s32), [[COPY19]](p5) :: (store 4 into %stack.1 + 76, align 256, addrspace 5)
- ; CHECK: [[C23:%[0-9]+]]:_(s32) = G_CONSTANT i32 80
- ; CHECK: [[PTR_ADD22:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C23]](s32)
- ; CHECK: [[COPY20:%[0-9]+]]:_(p5) = COPY [[PTR_ADD22]](p5)
- ; CHECK: G_STORE [[UV20]](s32), [[COPY20]](p5) :: (store 4 into %stack.1 + 80, align 256, addrspace 5)
- ; CHECK: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 84
- ; CHECK: [[PTR_ADD23:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C24]](s32)
- ; CHECK: [[COPY21:%[0-9]+]]:_(p5) = COPY [[PTR_ADD23]](p5)
- ; CHECK: G_STORE [[UV21]](s32), [[COPY21]](p5) :: (store 4 into %stack.1 + 84, align 256, addrspace 5)
- ; CHECK: [[C25:%[0-9]+]]:_(s32) = G_CONSTANT i32 88
- ; CHECK: [[PTR_ADD24:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C25]](s32)
- ; CHECK: [[COPY22:%[0-9]+]]:_(p5) = COPY [[PTR_ADD24]](p5)
- ; CHECK: G_STORE [[UV22]](s32), [[COPY22]](p5) :: (store 4 into %stack.1 + 88, align 256, addrspace 5)
- ; CHECK: [[C26:%[0-9]+]]:_(s32) = G_CONSTANT i32 92
- ; CHECK: [[PTR_ADD25:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C26]](s32)
- ; CHECK: [[COPY23:%[0-9]+]]:_(p5) = COPY [[PTR_ADD25]](p5)
- ; CHECK: G_STORE [[UV23]](s32), [[COPY23]](p5) :: (store 4 into %stack.1 + 92, align 256, addrspace 5)
- ; CHECK: [[C27:%[0-9]+]]:_(s32) = G_CONSTANT i32 96
- ; CHECK: [[PTR_ADD26:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C27]](s32)
- ; CHECK: [[COPY24:%[0-9]+]]:_(p5) = COPY [[PTR_ADD26]](p5)
- ; CHECK: G_STORE [[UV24]](s32), [[COPY24]](p5) :: (store 4 into %stack.1 + 96, align 256, addrspace 5)
- ; CHECK: [[C28:%[0-9]+]]:_(s32) = G_CONSTANT i32 100
- ; CHECK: [[PTR_ADD27:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C28]](s32)
- ; CHECK: [[COPY25:%[0-9]+]]:_(p5) = COPY [[PTR_ADD27]](p5)
- ; CHECK: G_STORE [[UV25]](s32), [[COPY25]](p5) :: (store 4 into %stack.1 + 100, align 256, addrspace 5)
- ; CHECK: [[C29:%[0-9]+]]:_(s32) = G_CONSTANT i32 104
- ; CHECK: [[PTR_ADD28:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C29]](s32)
- ; CHECK: [[COPY26:%[0-9]+]]:_(p5) = COPY [[PTR_ADD28]](p5)
- ; CHECK: G_STORE [[UV26]](s32), [[COPY26]](p5) :: (store 4 into %stack.1 + 104, align 256, addrspace 5)
- ; CHECK: [[C30:%[0-9]+]]:_(s32) = G_CONSTANT i32 108
- ; CHECK: [[PTR_ADD29:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C30]](s32)
- ; CHECK: [[COPY27:%[0-9]+]]:_(p5) = COPY [[PTR_ADD29]](p5)
- ; CHECK: G_STORE [[UV27]](s32), [[COPY27]](p5) :: (store 4 into %stack.1 + 108, align 256, addrspace 5)
- ; CHECK: [[C31:%[0-9]+]]:_(s32) = G_CONSTANT i32 112
- ; CHECK: [[PTR_ADD30:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C31]](s32)
- ; CHECK: [[COPY28:%[0-9]+]]:_(p5) = COPY [[PTR_ADD30]](p5)
- ; CHECK: G_STORE [[UV28]](s32), [[COPY28]](p5) :: (store 4 into %stack.1 + 112, align 256, addrspace 5)
- ; CHECK: [[C32:%[0-9]+]]:_(s32) = G_CONSTANT i32 116
- ; CHECK: [[PTR_ADD31:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C32]](s32)
- ; CHECK: [[COPY29:%[0-9]+]]:_(p5) = COPY [[PTR_ADD31]](p5)
- ; CHECK: G_STORE [[UV29]](s32), [[COPY29]](p5) :: (store 4 into %stack.1 + 116, align 256, addrspace 5)
- ; CHECK: [[C33:%[0-9]+]]:_(s32) = G_CONSTANT i32 120
- ; CHECK: [[PTR_ADD32:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C33]](s32)
- ; CHECK: [[COPY30:%[0-9]+]]:_(p5) = COPY [[PTR_ADD32]](p5)
- ; CHECK: G_STORE [[UV30]](s32), [[COPY30]](p5) :: (store 4 into %stack.1 + 120, align 256, addrspace 5)
- ; CHECK: [[C34:%[0-9]+]]:_(s32) = G_CONSTANT i32 124
- ; CHECK: [[PTR_ADD33:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C34]](s32)
- ; CHECK: [[COPY31:%[0-9]+]]:_(p5) = COPY [[PTR_ADD33]](p5)
- ; CHECK: G_STORE [[UV31]](s32), [[COPY31]](p5) :: (store 4 into %stack.1 + 124, align 256, addrspace 5)
- ; CHECK: [[C35:%[0-9]+]]:_(s32) = G_CONSTANT i32 128
- ; CHECK: [[PTR_ADD34:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C35]](s32)
- ; CHECK: [[COPY32:%[0-9]+]]:_(p5) = COPY [[PTR_ADD34]](p5)
- ; CHECK: G_STORE [[UV32]](s32), [[COPY32]](p5) :: (store 4 into %stack.1 + 128, align 256, addrspace 5)
- ; CHECK: [[C36:%[0-9]+]]:_(s32) = G_CONSTANT i32 132
- ; CHECK: [[PTR_ADD35:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C36]](s32)
- ; CHECK: [[COPY33:%[0-9]+]]:_(p5) = COPY [[PTR_ADD35]](p5)
- ; CHECK: G_STORE [[UV33]](s32), [[COPY33]](p5) :: (store 4 into %stack.1 + 132, align 256, addrspace 5)
- ; CHECK: [[C37:%[0-9]+]]:_(s32) = G_CONSTANT i32 136
- ; CHECK: [[PTR_ADD36:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C37]](s32)
- ; CHECK: [[COPY34:%[0-9]+]]:_(p5) = COPY [[PTR_ADD36]](p5)
- ; CHECK: G_STORE [[UV34]](s32), [[COPY34]](p5) :: (store 4 into %stack.1 + 136, align 256, addrspace 5)
- ; CHECK: [[C38:%[0-9]+]]:_(s32) = G_CONSTANT i32 140
- ; CHECK: [[PTR_ADD37:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C38]](s32)
- ; CHECK: [[COPY35:%[0-9]+]]:_(p5) = COPY [[PTR_ADD37]](p5)
- ; CHECK: G_STORE [[UV35]](s32), [[COPY35]](p5) :: (store 4 into %stack.1 + 140, align 256, addrspace 5)
- ; CHECK: [[C39:%[0-9]+]]:_(s32) = G_CONSTANT i32 144
- ; CHECK: [[PTR_ADD38:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C39]](s32)
- ; CHECK: [[COPY36:%[0-9]+]]:_(p5) = COPY [[PTR_ADD38]](p5)
- ; CHECK: G_STORE [[UV36]](s32), [[COPY36]](p5) :: (store 4 into %stack.1 + 144, align 256, addrspace 5)
- ; CHECK: [[C40:%[0-9]+]]:_(s32) = G_CONSTANT i32 148
- ; CHECK: [[PTR_ADD39:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C40]](s32)
- ; CHECK: [[COPY37:%[0-9]+]]:_(p5) = COPY [[PTR_ADD39]](p5)
- ; CHECK: G_STORE [[UV37]](s32), [[COPY37]](p5) :: (store 4 into %stack.1 + 148, align 256, addrspace 5)
- ; CHECK: [[C41:%[0-9]+]]:_(s32) = G_CONSTANT i32 152
- ; CHECK: [[PTR_ADD40:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C41]](s32)
- ; CHECK: [[COPY38:%[0-9]+]]:_(p5) = COPY [[PTR_ADD40]](p5)
- ; CHECK: G_STORE [[UV38]](s32), [[COPY38]](p5) :: (store 4 into %stack.1 + 152, align 256, addrspace 5)
- ; CHECK: [[C42:%[0-9]+]]:_(s32) = G_CONSTANT i32 156
- ; CHECK: [[PTR_ADD41:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C42]](s32)
- ; CHECK: [[COPY39:%[0-9]+]]:_(p5) = COPY [[PTR_ADD41]](p5)
- ; CHECK: G_STORE [[UV39]](s32), [[COPY39]](p5) :: (store 4 into %stack.1 + 156, align 256, addrspace 5)
- ; CHECK: [[C43:%[0-9]+]]:_(s32) = G_CONSTANT i32 160
- ; CHECK: [[PTR_ADD42:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C43]](s32)
- ; CHECK: [[COPY40:%[0-9]+]]:_(p5) = COPY [[PTR_ADD42]](p5)
- ; CHECK: G_STORE [[UV40]](s32), [[COPY40]](p5) :: (store 4 into %stack.1 + 160, align 256, addrspace 5)
- ; CHECK: [[C44:%[0-9]+]]:_(s32) = G_CONSTANT i32 164
- ; CHECK: [[PTR_ADD43:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C44]](s32)
- ; CHECK: [[COPY41:%[0-9]+]]:_(p5) = COPY [[PTR_ADD43]](p5)
- ; CHECK: G_STORE [[UV41]](s32), [[COPY41]](p5) :: (store 4 into %stack.1 + 164, align 256, addrspace 5)
- ; CHECK: [[C45:%[0-9]+]]:_(s32) = G_CONSTANT i32 168
- ; CHECK: [[PTR_ADD44:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C45]](s32)
- ; CHECK: [[COPY42:%[0-9]+]]:_(p5) = COPY [[PTR_ADD44]](p5)
- ; CHECK: G_STORE [[UV42]](s32), [[COPY42]](p5) :: (store 4 into %stack.1 + 168, align 256, addrspace 5)
- ; CHECK: [[C46:%[0-9]+]]:_(s32) = G_CONSTANT i32 172
- ; CHECK: [[PTR_ADD45:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C46]](s32)
- ; CHECK: [[COPY43:%[0-9]+]]:_(p5) = COPY [[PTR_ADD45]](p5)
- ; CHECK: G_STORE [[UV43]](s32), [[COPY43]](p5) :: (store 4 into %stack.1 + 172, align 256, addrspace 5)
- ; CHECK: [[C47:%[0-9]+]]:_(s32) = G_CONSTANT i32 176
- ; CHECK: [[PTR_ADD46:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C47]](s32)
- ; CHECK: [[COPY44:%[0-9]+]]:_(p5) = COPY [[PTR_ADD46]](p5)
- ; CHECK: G_STORE [[UV44]](s32), [[COPY44]](p5) :: (store 4 into %stack.1 + 176, align 256, addrspace 5)
- ; CHECK: [[C48:%[0-9]+]]:_(s32) = G_CONSTANT i32 180
- ; CHECK: [[PTR_ADD47:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C48]](s32)
- ; CHECK: [[COPY45:%[0-9]+]]:_(p5) = COPY [[PTR_ADD47]](p5)
- ; CHECK: G_STORE [[UV45]](s32), [[COPY45]](p5) :: (store 4 into %stack.1 + 180, align 256, addrspace 5)
- ; CHECK: [[C49:%[0-9]+]]:_(s32) = G_CONSTANT i32 184
- ; CHECK: [[PTR_ADD48:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C49]](s32)
- ; CHECK: [[COPY46:%[0-9]+]]:_(p5) = COPY [[PTR_ADD48]](p5)
- ; CHECK: G_STORE [[UV46]](s32), [[COPY46]](p5) :: (store 4 into %stack.1 + 184, align 256, addrspace 5)
- ; CHECK: [[C50:%[0-9]+]]:_(s32) = G_CONSTANT i32 188
- ; CHECK: [[PTR_ADD49:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C50]](s32)
- ; CHECK: [[COPY47:%[0-9]+]]:_(p5) = COPY [[PTR_ADD49]](p5)
- ; CHECK: G_STORE [[UV47]](s32), [[COPY47]](p5) :: (store 4 into %stack.1 + 188, align 256, addrspace 5)
- ; CHECK: [[C51:%[0-9]+]]:_(s32) = G_CONSTANT i32 192
- ; CHECK: [[PTR_ADD50:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C51]](s32)
- ; CHECK: [[COPY48:%[0-9]+]]:_(p5) = COPY [[PTR_ADD50]](p5)
- ; CHECK: G_STORE [[UV48]](s32), [[COPY48]](p5) :: (store 4 into %stack.1 + 192, align 256, addrspace 5)
- ; CHECK: [[C52:%[0-9]+]]:_(s32) = G_CONSTANT i32 196
- ; CHECK: [[PTR_ADD51:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C52]](s32)
- ; CHECK: [[COPY49:%[0-9]+]]:_(p5) = COPY [[PTR_ADD51]](p5)
- ; CHECK: G_STORE [[UV49]](s32), [[COPY49]](p5) :: (store 4 into %stack.1 + 196, align 256, addrspace 5)
- ; CHECK: [[C53:%[0-9]+]]:_(s32) = G_CONSTANT i32 200
- ; CHECK: [[PTR_ADD52:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C53]](s32)
- ; CHECK: [[COPY50:%[0-9]+]]:_(p5) = COPY [[PTR_ADD52]](p5)
- ; CHECK: G_STORE [[UV50]](s32), [[COPY50]](p5) :: (store 4 into %stack.1 + 200, align 256, addrspace 5)
- ; CHECK: [[C54:%[0-9]+]]:_(s32) = G_CONSTANT i32 204
- ; CHECK: [[PTR_ADD53:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C54]](s32)
- ; CHECK: [[COPY51:%[0-9]+]]:_(p5) = COPY [[PTR_ADD53]](p5)
- ; CHECK: G_STORE [[UV51]](s32), [[COPY51]](p5) :: (store 4 into %stack.1 + 204, align 256, addrspace 5)
- ; CHECK: [[C55:%[0-9]+]]:_(s32) = G_CONSTANT i32 208
- ; CHECK: [[PTR_ADD54:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C55]](s32)
- ; CHECK: [[COPY52:%[0-9]+]]:_(p5) = COPY [[PTR_ADD54]](p5)
- ; CHECK: G_STORE [[UV52]](s32), [[COPY52]](p5) :: (store 4 into %stack.1 + 208, align 256, addrspace 5)
- ; CHECK: [[C56:%[0-9]+]]:_(s32) = G_CONSTANT i32 212
- ; CHECK: [[PTR_ADD55:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C56]](s32)
- ; CHECK: [[COPY53:%[0-9]+]]:_(p5) = COPY [[PTR_ADD55]](p5)
- ; CHECK: G_STORE [[UV53]](s32), [[COPY53]](p5) :: (store 4 into %stack.1 + 212, align 256, addrspace 5)
- ; CHECK: [[C57:%[0-9]+]]:_(s32) = G_CONSTANT i32 216
- ; CHECK: [[PTR_ADD56:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C57]](s32)
- ; CHECK: [[COPY54:%[0-9]+]]:_(p5) = COPY [[PTR_ADD56]](p5)
- ; CHECK: G_STORE [[UV54]](s32), [[COPY54]](p5) :: (store 4 into %stack.1 + 216, align 256, addrspace 5)
- ; CHECK: [[C58:%[0-9]+]]:_(s32) = G_CONSTANT i32 220
- ; CHECK: [[PTR_ADD57:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C58]](s32)
- ; CHECK: [[COPY55:%[0-9]+]]:_(p5) = COPY [[PTR_ADD57]](p5)
- ; CHECK: G_STORE [[UV55]](s32), [[COPY55]](p5) :: (store 4 into %stack.1 + 220, align 256, addrspace 5)
- ; CHECK: [[C59:%[0-9]+]]:_(s32) = G_CONSTANT i32 224
- ; CHECK: [[PTR_ADD58:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C59]](s32)
- ; CHECK: [[COPY56:%[0-9]+]]:_(p5) = COPY [[PTR_ADD58]](p5)
- ; CHECK: G_STORE [[UV56]](s32), [[COPY56]](p5) :: (store 4 into %stack.1 + 224, align 256, addrspace 5)
- ; CHECK: [[C60:%[0-9]+]]:_(s32) = G_CONSTANT i32 228
- ; CHECK: [[PTR_ADD59:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C60]](s32)
- ; CHECK: [[COPY57:%[0-9]+]]:_(p5) = COPY [[PTR_ADD59]](p5)
- ; CHECK: G_STORE [[UV57]](s32), [[COPY57]](p5) :: (store 4 into %stack.1 + 228, align 256, addrspace 5)
- ; CHECK: [[C61:%[0-9]+]]:_(s32) = G_CONSTANT i32 232
- ; CHECK: [[PTR_ADD60:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C61]](s32)
- ; CHECK: [[COPY58:%[0-9]+]]:_(p5) = COPY [[PTR_ADD60]](p5)
- ; CHECK: G_STORE [[UV58]](s32), [[COPY58]](p5) :: (store 4 into %stack.1 + 232, align 256, addrspace 5)
- ; CHECK: [[C62:%[0-9]+]]:_(s32) = G_CONSTANT i32 236
- ; CHECK: [[PTR_ADD61:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C62]](s32)
- ; CHECK: [[COPY59:%[0-9]+]]:_(p5) = COPY [[PTR_ADD61]](p5)
- ; CHECK: G_STORE [[UV59]](s32), [[COPY59]](p5) :: (store 4 into %stack.1 + 236, align 256, addrspace 5)
- ; CHECK: [[C63:%[0-9]+]]:_(s32) = G_CONSTANT i32 240
- ; CHECK: [[PTR_ADD62:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C63]](s32)
- ; CHECK: [[COPY60:%[0-9]+]]:_(p5) = COPY [[PTR_ADD62]](p5)
- ; CHECK: G_STORE [[UV60]](s32), [[COPY60]](p5) :: (store 4 into %stack.1 + 240, align 256, addrspace 5)
- ; CHECK: [[C64:%[0-9]+]]:_(s32) = G_CONSTANT i32 244
- ; CHECK: [[PTR_ADD63:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C64]](s32)
- ; CHECK: [[COPY61:%[0-9]+]]:_(p5) = COPY [[PTR_ADD63]](p5)
- ; CHECK: G_STORE [[UV61]](s32), [[COPY61]](p5) :: (store 4 into %stack.1 + 244, align 256, addrspace 5)
- ; CHECK: [[C65:%[0-9]+]]:_(s32) = G_CONSTANT i32 248
- ; CHECK: [[PTR_ADD64:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C65]](s32)
- ; CHECK: [[COPY62:%[0-9]+]]:_(p5) = COPY [[PTR_ADD64]](p5)
- ; CHECK: G_STORE [[UV62]](s32), [[COPY62]](p5) :: (store 4 into %stack.1 + 248, align 256, addrspace 5)
- ; CHECK: [[C66:%[0-9]+]]:_(s32) = G_CONSTANT i32 252
- ; CHECK: [[PTR_ADD65:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C66]](s32)
- ; CHECK: [[COPY63:%[0-9]+]]:_(p5) = COPY [[PTR_ADD65]](p5)
- ; CHECK: G_STORE [[UV63]](s32), [[COPY63]](p5) :: (store 4 into %stack.1 + 252, align 256, addrspace 5)
- ; CHECK: [[C67:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
- ; CHECK: [[PTR_ADD66:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C67]](s32)
- ; CHECK: G_STORE [[C4]](s32), [[PTR_ADD66]](p5) :: (store 4 into %stack.1 + 256, align 256, addrspace 5)
- ; CHECK: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (load 4 from %stack.1 + 256, align 256, addrspace 5)
- ; CHECK: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 from %stack.1 + 260, align 256, addrspace 5)
- ; CHECK: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 from %stack.1 + 264, align 256, addrspace 5)
- ; CHECK: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 from %stack.1 + 268, align 256, addrspace 5)
- ; CHECK: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 from %stack.1 + 272, align 256, addrspace 5)
- ; CHECK: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 4 from %stack.1 + 276, align 256, addrspace 5)
- ; CHECK: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 4 from %stack.1 + 280, align 256, addrspace 5)
- ; CHECK: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 4 from %stack.1 + 284, align 256, addrspace 5)
- ; CHECK: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 4 from %stack.1 + 288, align 256, addrspace 5)
- ; CHECK: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 4 from %stack.1 + 292, align 256, addrspace 5)
- ; CHECK: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 4 from %stack.1 + 296, align 256, addrspace 5)
- ; CHECK: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 4 from %stack.1 + 300, align 256, addrspace 5)
- ; CHECK: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 4 from %stack.1 + 304, align 256, addrspace 5)
- ; CHECK: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p5) :: (load 4 from %stack.1 + 308, align 256, addrspace 5)
- ; CHECK: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p5) :: (load 4 from %stack.1 + 312, align 256, addrspace 5)
- ; CHECK: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p5) :: (load 4 from %stack.1 + 316, align 256, addrspace 5)
- ; CHECK: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p5) :: (load 4 from %stack.1 + 320, align 256, addrspace 5)
- ; CHECK: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p5) :: (load 4 from %stack.1 + 324, align 256, addrspace 5)
- ; CHECK: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p5) :: (load 4 from %stack.1 + 328, align 256, addrspace 5)
- ; CHECK: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p5) :: (load 4 from %stack.1 + 332, align 256, addrspace 5)
- ; CHECK: [[LOAD24:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p5) :: (load 4 from %stack.1 + 336, align 256, addrspace 5)
- ; CHECK: [[LOAD25:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD23]](p5) :: (load 4 from %stack.1 + 340, align 256, addrspace 5)
- ; CHECK: [[LOAD26:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD24]](p5) :: (load 4 from %stack.1 + 344, align 256, addrspace 5)
- ; CHECK: [[LOAD27:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD25]](p5) :: (load 4 from %stack.1 + 348, align 256, addrspace 5)
- ; CHECK: [[LOAD28:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD26]](p5) :: (load 4 from %stack.1 + 352, align 256, addrspace 5)
- ; CHECK: [[LOAD29:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD27]](p5) :: (load 4 from %stack.1 + 356, align 256, addrspace 5)
- ; CHECK: [[LOAD30:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD28]](p5) :: (load 4 from %stack.1 + 360, align 256, addrspace 5)
- ; CHECK: [[LOAD31:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD29]](p5) :: (load 4 from %stack.1 + 364, align 256, addrspace 5)
- ; CHECK: [[LOAD32:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD30]](p5) :: (load 4 from %stack.1 + 368, align 256, addrspace 5)
- ; CHECK: [[LOAD33:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD31]](p5) :: (load 4 from %stack.1 + 372, align 256, addrspace 5)
- ; CHECK: [[LOAD34:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD32]](p5) :: (load 4 from %stack.1 + 376, align 256, addrspace 5)
- ; CHECK: [[LOAD35:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD33]](p5) :: (load 4 from %stack.1 + 380, align 256, addrspace 5)
- ; CHECK: [[LOAD36:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD34]](p5) :: (load 4 from %stack.1 + 384, align 256, addrspace 5)
- ; CHECK: [[LOAD37:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD35]](p5) :: (load 4 from %stack.1 + 388, align 256, addrspace 5)
- ; CHECK: [[LOAD38:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD36]](p5) :: (load 4 from %stack.1 + 392, align 256, addrspace 5)
- ; CHECK: [[LOAD39:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD37]](p5) :: (load 4 from %stack.1 + 396, align 256, addrspace 5)
- ; CHECK: [[LOAD40:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD38]](p5) :: (load 4 from %stack.1 + 400, align 256, addrspace 5)
- ; CHECK: [[LOAD41:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD39]](p5) :: (load 4 from %stack.1 + 404, align 256, addrspace 5)
- ; CHECK: [[LOAD42:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD40]](p5) :: (load 4 from %stack.1 + 408, align 256, addrspace 5)
- ; CHECK: [[LOAD43:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD41]](p5) :: (load 4 from %stack.1 + 412, align 256, addrspace 5)
- ; CHECK: [[LOAD44:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD42]](p5) :: (load 4 from %stack.1 + 416, align 256, addrspace 5)
- ; CHECK: [[LOAD45:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD43]](p5) :: (load 4 from %stack.1 + 420, align 256, addrspace 5)
- ; CHECK: [[LOAD46:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD44]](p5) :: (load 4 from %stack.1 + 424, align 256, addrspace 5)
- ; CHECK: [[LOAD47:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD45]](p5) :: (load 4 from %stack.1 + 428, align 256, addrspace 5)
- ; CHECK: [[LOAD48:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD46]](p5) :: (load 4 from %stack.1 + 432, align 256, addrspace 5)
- ; CHECK: [[LOAD49:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD47]](p5) :: (load 4 from %stack.1 + 436, align 256, addrspace 5)
- ; CHECK: [[LOAD50:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD48]](p5) :: (load 4 from %stack.1 + 440, align 256, addrspace 5)
- ; CHECK: [[LOAD51:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD49]](p5) :: (load 4 from %stack.1 + 444, align 256, addrspace 5)
- ; CHECK: [[LOAD52:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD50]](p5) :: (load 4 from %stack.1 + 448, align 256, addrspace 5)
- ; CHECK: [[LOAD53:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD51]](p5) :: (load 4 from %stack.1 + 452, align 256, addrspace 5)
- ; CHECK: [[LOAD54:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD52]](p5) :: (load 4 from %stack.1 + 456, align 256, addrspace 5)
- ; CHECK: [[LOAD55:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD53]](p5) :: (load 4 from %stack.1 + 460, align 256, addrspace 5)
- ; CHECK: [[LOAD56:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD54]](p5) :: (load 4 from %stack.1 + 464, align 256, addrspace 5)
- ; CHECK: [[LOAD57:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD55]](p5) :: (load 4 from %stack.1 + 468, align 256, addrspace 5)
- ; CHECK: [[LOAD58:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD56]](p5) :: (load 4 from %stack.1 + 472, align 256, addrspace 5)
- ; CHECK: [[LOAD59:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD57]](p5) :: (load 4 from %stack.1 + 476, align 256, addrspace 5)
- ; CHECK: [[LOAD60:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD58]](p5) :: (load 4 from %stack.1 + 480, align 256, addrspace 5)
- ; CHECK: [[LOAD61:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD59]](p5) :: (load 4 from %stack.1 + 484, align 256, addrspace 5)
- ; CHECK: [[LOAD62:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD60]](p5) :: (load 4 from %stack.1 + 488, align 256, addrspace 5)
- ; CHECK: [[LOAD63:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD61]](p5) :: (load 4 from %stack.1 + 492, align 256, addrspace 5)
- ; CHECK: [[LOAD64:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD62]](p5) :: (load 4 from %stack.1 + 496, align 256, addrspace 5)
- ; CHECK: [[LOAD65:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD63]](p5) :: (load 4 from %stack.1 + 500, align 256, addrspace 5)
- ; CHECK: [[LOAD66:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD64]](p5) :: (load 4 from %stack.1 + 504, align 256, addrspace 5)
- ; CHECK: [[LOAD67:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD65]](p5) :: (load 4 from %stack.1 + 508, align 256, addrspace 5)
- ; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0
- ; CHECK: [[UV64:%[0-9]+]]:_(s32), [[UV65:%[0-9]+]]:_(s32), [[UV66:%[0-9]+]]:_(s32), [[UV67:%[0-9]+]]:_(s32), [[UV68:%[0-9]+]]:_(s32), [[UV69:%[0-9]+]]:_(s32), [[UV70:%[0-9]+]]:_(s32), [[UV71:%[0-9]+]]:_(s32), [[UV72:%[0-9]+]]:_(s32), [[UV73:%[0-9]+]]:_(s32), [[UV74:%[0-9]+]]:_(s32), [[UV75:%[0-9]+]]:_(s32), [[UV76:%[0-9]+]]:_(s32), [[UV77:%[0-9]+]]:_(s32), [[UV78:%[0-9]+]]:_(s32), [[UV79:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>)
- ; CHECK: [[UV80:%[0-9]+]]:_(s32), [[UV81:%[0-9]+]]:_(s32), [[UV82:%[0-9]+]]:_(s32), [[UV83:%[0-9]+]]:_(s32), [[UV84:%[0-9]+]]:_(s32), [[UV85:%[0-9]+]]:_(s32), [[UV86:%[0-9]+]]:_(s32), [[UV87:%[0-9]+]]:_(s32), [[UV88:%[0-9]+]]:_(s32), [[UV89:%[0-9]+]]:_(s32), [[UV90:%[0-9]+]]:_(s32), [[UV91:%[0-9]+]]:_(s32), [[UV92:%[0-9]+]]:_(s32), [[UV93:%[0-9]+]]:_(s32), [[UV94:%[0-9]+]]:_(s32), [[UV95:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<16 x s32>)
- ; CHECK: [[UV96:%[0-9]+]]:_(s32), [[UV97:%[0-9]+]]:_(s32), [[UV98:%[0-9]+]]:_(s32), [[UV99:%[0-9]+]]:_(s32), [[UV100:%[0-9]+]]:_(s32), [[UV101:%[0-9]+]]:_(s32), [[UV102:%[0-9]+]]:_(s32), [[UV103:%[0-9]+]]:_(s32), [[UV104:%[0-9]+]]:_(s32), [[UV105:%[0-9]+]]:_(s32), [[UV106:%[0-9]+]]:_(s32), [[UV107:%[0-9]+]]:_(s32), [[UV108:%[0-9]+]]:_(s32), [[UV109:%[0-9]+]]:_(s32), [[UV110:%[0-9]+]]:_(s32), [[UV111:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD2]](<16 x s32>)
- ; CHECK: [[UV112:%[0-9]+]]:_(s32), [[UV113:%[0-9]+]]:_(s32), [[UV114:%[0-9]+]]:_(s32), [[UV115:%[0-9]+]]:_(s32), [[UV116:%[0-9]+]]:_(s32), [[UV117:%[0-9]+]]:_(s32), [[UV118:%[0-9]+]]:_(s32), [[UV119:%[0-9]+]]:_(s32), [[UV120:%[0-9]+]]:_(s32), [[UV121:%[0-9]+]]:_(s32), [[UV122:%[0-9]+]]:_(s32), [[UV123:%[0-9]+]]:_(s32), [[UV124:%[0-9]+]]:_(s32), [[UV125:%[0-9]+]]:_(s32), [[UV126:%[0-9]+]]:_(s32), [[UV127:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD3]](<16 x s32>)
- ; CHECK: G_STORE [[UV64]](s32), [[FRAME_INDEX1]](p5) :: (store 4 into %stack.0, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD67:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C5]](s32)
- ; CHECK: [[COPY64:%[0-9]+]]:_(p5) = COPY [[PTR_ADD67]](p5)
- ; CHECK: G_STORE [[UV65]](s32), [[COPY64]](p5) :: (store 4 into %stack.0 + 4, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD68:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C6]](s32)
- ; CHECK: [[COPY65:%[0-9]+]]:_(p5) = COPY [[PTR_ADD68]](p5)
- ; CHECK: G_STORE [[UV66]](s32), [[COPY65]](p5) :: (store 4 into %stack.0 + 8, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD69:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C7]](s32)
- ; CHECK: [[COPY66:%[0-9]+]]:_(p5) = COPY [[PTR_ADD69]](p5)
- ; CHECK: G_STORE [[UV67]](s32), [[COPY66]](p5) :: (store 4 into %stack.0 + 12, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD70:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C8]](s32)
- ; CHECK: [[COPY67:%[0-9]+]]:_(p5) = COPY [[PTR_ADD70]](p5)
- ; CHECK: G_STORE [[UV68]](s32), [[COPY67]](p5) :: (store 4 into %stack.0 + 16, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD71:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C9]](s32)
- ; CHECK: [[COPY68:%[0-9]+]]:_(p5) = COPY [[PTR_ADD71]](p5)
- ; CHECK: G_STORE [[UV69]](s32), [[COPY68]](p5) :: (store 4 into %stack.0 + 20, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD72:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C10]](s32)
- ; CHECK: [[COPY69:%[0-9]+]]:_(p5) = COPY [[PTR_ADD72]](p5)
- ; CHECK: G_STORE [[UV70]](s32), [[COPY69]](p5) :: (store 4 into %stack.0 + 24, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD73:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C11]](s32)
- ; CHECK: [[COPY70:%[0-9]+]]:_(p5) = COPY [[PTR_ADD73]](p5)
- ; CHECK: G_STORE [[UV71]](s32), [[COPY70]](p5) :: (store 4 into %stack.0 + 28, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD74:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C12]](s32)
- ; CHECK: [[COPY71:%[0-9]+]]:_(p5) = COPY [[PTR_ADD74]](p5)
- ; CHECK: G_STORE [[UV72]](s32), [[COPY71]](p5) :: (store 4 into %stack.0 + 32, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD75:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C13]](s32)
- ; CHECK: [[COPY72:%[0-9]+]]:_(p5) = COPY [[PTR_ADD75]](p5)
- ; CHECK: G_STORE [[UV73]](s32), [[COPY72]](p5) :: (store 4 into %stack.0 + 36, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD76:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C14]](s32)
- ; CHECK: [[COPY73:%[0-9]+]]:_(p5) = COPY [[PTR_ADD76]](p5)
- ; CHECK: G_STORE [[UV74]](s32), [[COPY73]](p5) :: (store 4 into %stack.0 + 40, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD77:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C15]](s32)
- ; CHECK: [[COPY74:%[0-9]+]]:_(p5) = COPY [[PTR_ADD77]](p5)
- ; CHECK: G_STORE [[UV75]](s32), [[COPY74]](p5) :: (store 4 into %stack.0 + 44, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD78:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C16]](s32)
- ; CHECK: [[COPY75:%[0-9]+]]:_(p5) = COPY [[PTR_ADD78]](p5)
- ; CHECK: G_STORE [[UV76]](s32), [[COPY75]](p5) :: (store 4 into %stack.0 + 48, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD79:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C17]](s32)
- ; CHECK: [[COPY76:%[0-9]+]]:_(p5) = COPY [[PTR_ADD79]](p5)
- ; CHECK: G_STORE [[UV77]](s32), [[COPY76]](p5) :: (store 4 into %stack.0 + 52, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD80:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C18]](s32)
- ; CHECK: [[COPY77:%[0-9]+]]:_(p5) = COPY [[PTR_ADD80]](p5)
- ; CHECK: G_STORE [[UV78]](s32), [[COPY77]](p5) :: (store 4 into %stack.0 + 56, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD81:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C19]](s32)
- ; CHECK: [[COPY78:%[0-9]+]]:_(p5) = COPY [[PTR_ADD81]](p5)
- ; CHECK: G_STORE [[UV79]](s32), [[COPY78]](p5) :: (store 4 into %stack.0 + 60, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD82:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C]](s32)
- ; CHECK: [[COPY79:%[0-9]+]]:_(p5) = COPY [[PTR_ADD82]](p5)
- ; CHECK: G_STORE [[UV80]](s32), [[COPY79]](p5) :: (store 4 into %stack.0 + 64, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD83:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C20]](s32)
- ; CHECK: [[COPY80:%[0-9]+]]:_(p5) = COPY [[PTR_ADD83]](p5)
- ; CHECK: G_STORE [[UV81]](s32), [[COPY80]](p5) :: (store 4 into %stack.0 + 68, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD84:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C21]](s32)
- ; CHECK: [[COPY81:%[0-9]+]]:_(p5) = COPY [[PTR_ADD84]](p5)
- ; CHECK: G_STORE [[UV82]](s32), [[COPY81]](p5) :: (store 4 into %stack.0 + 72, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD85:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C22]](s32)
- ; CHECK: [[COPY82:%[0-9]+]]:_(p5) = COPY [[PTR_ADD85]](p5)
- ; CHECK: G_STORE [[UV83]](s32), [[COPY82]](p5) :: (store 4 into %stack.0 + 76, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD86:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C23]](s32)
- ; CHECK: [[COPY83:%[0-9]+]]:_(p5) = COPY [[PTR_ADD86]](p5)
- ; CHECK: G_STORE [[UV84]](s32), [[COPY83]](p5) :: (store 4 into %stack.0 + 80, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD87:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C24]](s32)
- ; CHECK: [[COPY84:%[0-9]+]]:_(p5) = COPY [[PTR_ADD87]](p5)
- ; CHECK: G_STORE [[UV85]](s32), [[COPY84]](p5) :: (store 4 into %stack.0 + 84, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD88:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C25]](s32)
- ; CHECK: [[COPY85:%[0-9]+]]:_(p5) = COPY [[PTR_ADD88]](p5)
- ; CHECK: G_STORE [[UV86]](s32), [[COPY85]](p5) :: (store 4 into %stack.0 + 88, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD89:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C26]](s32)
- ; CHECK: [[COPY86:%[0-9]+]]:_(p5) = COPY [[PTR_ADD89]](p5)
- ; CHECK: G_STORE [[UV87]](s32), [[COPY86]](p5) :: (store 4 into %stack.0 + 92, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD90:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C27]](s32)
- ; CHECK: [[COPY87:%[0-9]+]]:_(p5) = COPY [[PTR_ADD90]](p5)
- ; CHECK: G_STORE [[UV88]](s32), [[COPY87]](p5) :: (store 4 into %stack.0 + 96, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD91:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C28]](s32)
- ; CHECK: [[COPY88:%[0-9]+]]:_(p5) = COPY [[PTR_ADD91]](p5)
- ; CHECK: G_STORE [[UV89]](s32), [[COPY88]](p5) :: (store 4 into %stack.0 + 100, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD92:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C29]](s32)
- ; CHECK: [[COPY89:%[0-9]+]]:_(p5) = COPY [[PTR_ADD92]](p5)
- ; CHECK: G_STORE [[UV90]](s32), [[COPY89]](p5) :: (store 4 into %stack.0 + 104, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD93:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C30]](s32)
- ; CHECK: [[COPY90:%[0-9]+]]:_(p5) = COPY [[PTR_ADD93]](p5)
- ; CHECK: G_STORE [[UV91]](s32), [[COPY90]](p5) :: (store 4 into %stack.0 + 108, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD94:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C31]](s32)
- ; CHECK: [[COPY91:%[0-9]+]]:_(p5) = COPY [[PTR_ADD94]](p5)
- ; CHECK: G_STORE [[UV92]](s32), [[COPY91]](p5) :: (store 4 into %stack.0 + 112, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD95:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C32]](s32)
- ; CHECK: [[COPY92:%[0-9]+]]:_(p5) = COPY [[PTR_ADD95]](p5)
- ; CHECK: G_STORE [[UV93]](s32), [[COPY92]](p5) :: (store 4 into %stack.0 + 116, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD96:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C33]](s32)
- ; CHECK: [[COPY93:%[0-9]+]]:_(p5) = COPY [[PTR_ADD96]](p5)
- ; CHECK: G_STORE [[UV94]](s32), [[COPY93]](p5) :: (store 4 into %stack.0 + 120, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD97:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C34]](s32)
- ; CHECK: [[COPY94:%[0-9]+]]:_(p5) = COPY [[PTR_ADD97]](p5)
- ; CHECK: G_STORE [[UV95]](s32), [[COPY94]](p5) :: (store 4 into %stack.0 + 124, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD98:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C35]](s32)
- ; CHECK: [[COPY95:%[0-9]+]]:_(p5) = COPY [[PTR_ADD98]](p5)
- ; CHECK: G_STORE [[UV96]](s32), [[COPY95]](p5) :: (store 4 into %stack.0 + 128, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD99:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C36]](s32)
- ; CHECK: [[COPY96:%[0-9]+]]:_(p5) = COPY [[PTR_ADD99]](p5)
- ; CHECK: G_STORE [[UV97]](s32), [[COPY96]](p5) :: (store 4 into %stack.0 + 132, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD100:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C37]](s32)
- ; CHECK: [[COPY97:%[0-9]+]]:_(p5) = COPY [[PTR_ADD100]](p5)
- ; CHECK: G_STORE [[UV98]](s32), [[COPY97]](p5) :: (store 4 into %stack.0 + 136, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD101:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C38]](s32)
- ; CHECK: [[COPY98:%[0-9]+]]:_(p5) = COPY [[PTR_ADD101]](p5)
- ; CHECK: G_STORE [[UV99]](s32), [[COPY98]](p5) :: (store 4 into %stack.0 + 140, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD102:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C39]](s32)
- ; CHECK: [[COPY99:%[0-9]+]]:_(p5) = COPY [[PTR_ADD102]](p5)
- ; CHECK: G_STORE [[UV100]](s32), [[COPY99]](p5) :: (store 4 into %stack.0 + 144, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD103:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C40]](s32)
- ; CHECK: [[COPY100:%[0-9]+]]:_(p5) = COPY [[PTR_ADD103]](p5)
- ; CHECK: G_STORE [[UV101]](s32), [[COPY100]](p5) :: (store 4 into %stack.0 + 148, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD104:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C41]](s32)
- ; CHECK: [[COPY101:%[0-9]+]]:_(p5) = COPY [[PTR_ADD104]](p5)
- ; CHECK: G_STORE [[UV102]](s32), [[COPY101]](p5) :: (store 4 into %stack.0 + 152, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD105:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C42]](s32)
- ; CHECK: [[COPY102:%[0-9]+]]:_(p5) = COPY [[PTR_ADD105]](p5)
- ; CHECK: G_STORE [[UV103]](s32), [[COPY102]](p5) :: (store 4 into %stack.0 + 156, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD106:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C43]](s32)
- ; CHECK: [[COPY103:%[0-9]+]]:_(p5) = COPY [[PTR_ADD106]](p5)
- ; CHECK: G_STORE [[UV104]](s32), [[COPY103]](p5) :: (store 4 into %stack.0 + 160, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD107:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C44]](s32)
- ; CHECK: [[COPY104:%[0-9]+]]:_(p5) = COPY [[PTR_ADD107]](p5)
- ; CHECK: G_STORE [[UV105]](s32), [[COPY104]](p5) :: (store 4 into %stack.0 + 164, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD108:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C45]](s32)
- ; CHECK: [[COPY105:%[0-9]+]]:_(p5) = COPY [[PTR_ADD108]](p5)
- ; CHECK: G_STORE [[UV106]](s32), [[COPY105]](p5) :: (store 4 into %stack.0 + 168, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD109:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C46]](s32)
- ; CHECK: [[COPY106:%[0-9]+]]:_(p5) = COPY [[PTR_ADD109]](p5)
- ; CHECK: G_STORE [[UV107]](s32), [[COPY106]](p5) :: (store 4 into %stack.0 + 172, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD110:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C47]](s32)
- ; CHECK: [[COPY107:%[0-9]+]]:_(p5) = COPY [[PTR_ADD110]](p5)
- ; CHECK: G_STORE [[UV108]](s32), [[COPY107]](p5) :: (store 4 into %stack.0 + 176, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD111:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C48]](s32)
- ; CHECK: [[COPY108:%[0-9]+]]:_(p5) = COPY [[PTR_ADD111]](p5)
- ; CHECK: G_STORE [[UV109]](s32), [[COPY108]](p5) :: (store 4 into %stack.0 + 180, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD112:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C49]](s32)
- ; CHECK: [[COPY109:%[0-9]+]]:_(p5) = COPY [[PTR_ADD112]](p5)
- ; CHECK: G_STORE [[UV110]](s32), [[COPY109]](p5) :: (store 4 into %stack.0 + 184, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD113:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C50]](s32)
- ; CHECK: [[COPY110:%[0-9]+]]:_(p5) = COPY [[PTR_ADD113]](p5)
- ; CHECK: G_STORE [[UV111]](s32), [[COPY110]](p5) :: (store 4 into %stack.0 + 188, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD114:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C51]](s32)
- ; CHECK: [[COPY111:%[0-9]+]]:_(p5) = COPY [[PTR_ADD114]](p5)
- ; CHECK: G_STORE [[UV112]](s32), [[COPY111]](p5) :: (store 4 into %stack.0 + 192, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD115:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C52]](s32)
- ; CHECK: [[COPY112:%[0-9]+]]:_(p5) = COPY [[PTR_ADD115]](p5)
- ; CHECK: G_STORE [[UV113]](s32), [[COPY112]](p5) :: (store 4 into %stack.0 + 196, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD116:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C53]](s32)
- ; CHECK: [[COPY113:%[0-9]+]]:_(p5) = COPY [[PTR_ADD116]](p5)
- ; CHECK: G_STORE [[UV114]](s32), [[COPY113]](p5) :: (store 4 into %stack.0 + 200, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD117:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C54]](s32)
- ; CHECK: [[COPY114:%[0-9]+]]:_(p5) = COPY [[PTR_ADD117]](p5)
- ; CHECK: G_STORE [[UV115]](s32), [[COPY114]](p5) :: (store 4 into %stack.0 + 204, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD118:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C55]](s32)
- ; CHECK: [[COPY115:%[0-9]+]]:_(p5) = COPY [[PTR_ADD118]](p5)
- ; CHECK: G_STORE [[UV116]](s32), [[COPY115]](p5) :: (store 4 into %stack.0 + 208, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD119:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C56]](s32)
- ; CHECK: [[COPY116:%[0-9]+]]:_(p5) = COPY [[PTR_ADD119]](p5)
- ; CHECK: G_STORE [[UV117]](s32), [[COPY116]](p5) :: (store 4 into %stack.0 + 212, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD120:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C57]](s32)
- ; CHECK: [[COPY117:%[0-9]+]]:_(p5) = COPY [[PTR_ADD120]](p5)
- ; CHECK: G_STORE [[UV118]](s32), [[COPY117]](p5) :: (store 4 into %stack.0 + 216, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD121:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C58]](s32)
- ; CHECK: [[COPY118:%[0-9]+]]:_(p5) = COPY [[PTR_ADD121]](p5)
- ; CHECK: G_STORE [[UV119]](s32), [[COPY118]](p5) :: (store 4 into %stack.0 + 220, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD122:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C59]](s32)
- ; CHECK: [[COPY119:%[0-9]+]]:_(p5) = COPY [[PTR_ADD122]](p5)
- ; CHECK: G_STORE [[UV120]](s32), [[COPY119]](p5) :: (store 4 into %stack.0 + 224, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD123:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C60]](s32)
- ; CHECK: [[COPY120:%[0-9]+]]:_(p5) = COPY [[PTR_ADD123]](p5)
- ; CHECK: G_STORE [[UV121]](s32), [[COPY120]](p5) :: (store 4 into %stack.0 + 228, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD124:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C61]](s32)
- ; CHECK: [[COPY121:%[0-9]+]]:_(p5) = COPY [[PTR_ADD124]](p5)
- ; CHECK: G_STORE [[UV122]](s32), [[COPY121]](p5) :: (store 4 into %stack.0 + 232, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD125:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C62]](s32)
- ; CHECK: [[COPY122:%[0-9]+]]:_(p5) = COPY [[PTR_ADD125]](p5)
- ; CHECK: G_STORE [[UV123]](s32), [[COPY122]](p5) :: (store 4 into %stack.0 + 236, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD126:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C63]](s32)
- ; CHECK: [[COPY123:%[0-9]+]]:_(p5) = COPY [[PTR_ADD126]](p5)
- ; CHECK: G_STORE [[UV124]](s32), [[COPY123]](p5) :: (store 4 into %stack.0 + 240, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD127:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C64]](s32)
- ; CHECK: [[COPY124:%[0-9]+]]:_(p5) = COPY [[PTR_ADD127]](p5)
- ; CHECK: G_STORE [[UV125]](s32), [[COPY124]](p5) :: (store 4 into %stack.0 + 244, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD128:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C65]](s32)
- ; CHECK: [[COPY125:%[0-9]+]]:_(p5) = COPY [[PTR_ADD128]](p5)
- ; CHECK: G_STORE [[UV126]](s32), [[COPY125]](p5) :: (store 4 into %stack.0 + 248, align 256, addrspace 5)
- ; CHECK: [[PTR_ADD129:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C66]](s32)
- ; CHECK: [[COPY126:%[0-9]+]]:_(p5) = COPY [[PTR_ADD129]](p5)
- ; CHECK: G_STORE [[UV127]](s32), [[COPY126]](p5) :: (store 4 into %stack.0 + 252, align 256, addrspace 5)
- ; CHECK: [[C68:%[0-9]+]]:_(s32) = G_CONSTANT i32 260
- ; CHECK: [[PTR_ADD130:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX1]], [[C68]](s32)
- ; CHECK: G_STORE [[C4]](s32), [[PTR_ADD130]](p5) :: (store 4 into %stack.0 + 260, addrspace 5)
- ; CHECK: [[LOAD68:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p5) :: (load 4 from %stack.0 + 260, align 256, addrspace 5)
- ; CHECK: [[LOAD69:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD67]](p5) :: (load 4 from %stack.0 + 264, align 256, addrspace 5)
- ; CHECK: [[LOAD70:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD68]](p5) :: (load 4 from %stack.0 + 268, align 256, addrspace 5)
- ; CHECK: [[LOAD71:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD69]](p5) :: (load 4 from %stack.0 + 272, align 256, addrspace 5)
- ; CHECK: [[LOAD72:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD70]](p5) :: (load 4 from %stack.0 + 276, align 256, addrspace 5)
- ; CHECK: [[LOAD73:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD71]](p5) :: (load 4 from %stack.0 + 280, align 256, addrspace 5)
- ; CHECK: [[LOAD74:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD72]](p5) :: (load 4 from %stack.0 + 284, align 256, addrspace 5)
- ; CHECK: [[LOAD75:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD73]](p5) :: (load 4 from %stack.0 + 288, align 256, addrspace 5)
- ; CHECK: [[LOAD76:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD74]](p5) :: (load 4 from %stack.0 + 292, align 256, addrspace 5)
- ; CHECK: [[LOAD77:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD75]](p5) :: (load 4 from %stack.0 + 296, align 256, addrspace 5)
- ; CHECK: [[LOAD78:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD76]](p5) :: (load 4 from %stack.0 + 300, align 256, addrspace 5)
- ; CHECK: [[LOAD79:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD77]](p5) :: (load 4 from %stack.0 + 304, align 256, addrspace 5)
- ; CHECK: [[LOAD80:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD78]](p5) :: (load 4 from %stack.0 + 308, align 256, addrspace 5)
- ; CHECK: [[LOAD81:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD79]](p5) :: (load 4 from %stack.0 + 312, align 256, addrspace 5)
- ; CHECK: [[LOAD82:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD80]](p5) :: (load 4 from %stack.0 + 316, align 256, addrspace 5)
- ; CHECK: [[LOAD83:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD81]](p5) :: (load 4 from %stack.0 + 320, align 256, addrspace 5)
- ; CHECK: [[LOAD84:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD82]](p5) :: (load 4 from %stack.0 + 324, align 256, addrspace 5)
- ; CHECK: [[LOAD85:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD83]](p5) :: (load 4 from %stack.0 + 328, align 256, addrspace 5)
- ; CHECK: [[LOAD86:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD84]](p5) :: (load 4 from %stack.0 + 332, align 256, addrspace 5)
- ; CHECK: [[LOAD87:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD85]](p5) :: (load 4 from %stack.0 + 336, align 256, addrspace 5)
- ; CHECK: [[LOAD88:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD86]](p5) :: (load 4 from %stack.0 + 340, align 256, addrspace 5)
- ; CHECK: [[LOAD89:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD87]](p5) :: (load 4 from %stack.0 + 344, align 256, addrspace 5)
- ; CHECK: [[LOAD90:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD88]](p5) :: (load 4 from %stack.0 + 348, align 256, addrspace 5)
- ; CHECK: [[LOAD91:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD89]](p5) :: (load 4 from %stack.0 + 352, align 256, addrspace 5)
- ; CHECK: [[LOAD92:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD90]](p5) :: (load 4 from %stack.0 + 356, align 256, addrspace 5)
- ; CHECK: [[LOAD93:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD91]](p5) :: (load 4 from %stack.0 + 360, align 256, addrspace 5)
- ; CHECK: [[LOAD94:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD92]](p5) :: (load 4 from %stack.0 + 364, align 256, addrspace 5)
- ; CHECK: [[LOAD95:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD93]](p5) :: (load 4 from %stack.0 + 368, align 256, addrspace 5)
- ; CHECK: [[LOAD96:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD94]](p5) :: (load 4 from %stack.0 + 372, align 256, addrspace 5)
- ; CHECK: [[LOAD97:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD95]](p5) :: (load 4 from %stack.0 + 376, align 256, addrspace 5)
- ; CHECK: [[LOAD98:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD96]](p5) :: (load 4 from %stack.0 + 380, align 256, addrspace 5)
- ; CHECK: [[LOAD99:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD97]](p5) :: (load 4 from %stack.0 + 384, align 256, addrspace 5)
- ; CHECK: [[LOAD100:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD98]](p5) :: (load 4 from %stack.0 + 388, align 256, addrspace 5)
- ; CHECK: [[LOAD101:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD99]](p5) :: (load 4 from %stack.0 + 392, align 256, addrspace 5)
- ; CHECK: [[LOAD102:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD100]](p5) :: (load 4 from %stack.0 + 396, align 256, addrspace 5)
- ; CHECK: [[LOAD103:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD101]](p5) :: (load 4 from %stack.0 + 400, align 256, addrspace 5)
- ; CHECK: [[LOAD104:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD102]](p5) :: (load 4 from %stack.0 + 404, align 256, addrspace 5)
- ; CHECK: [[LOAD105:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD103]](p5) :: (load 4 from %stack.0 + 408, align 256, addrspace 5)
- ; CHECK: [[LOAD106:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD104]](p5) :: (load 4 from %stack.0 + 412, align 256, addrspace 5)
- ; CHECK: [[LOAD107:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD105]](p5) :: (load 4 from %stack.0 + 416, align 256, addrspace 5)
- ; CHECK: [[LOAD108:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD106]](p5) :: (load 4 from %stack.0 + 420, align 256, addrspace 5)
- ; CHECK: [[LOAD109:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD107]](p5) :: (load 4 from %stack.0 + 424, align 256, addrspace 5)
- ; CHECK: [[LOAD110:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD108]](p5) :: (load 4 from %stack.0 + 428, align 256, addrspace 5)
- ; CHECK: [[LOAD111:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD109]](p5) :: (load 4 from %stack.0 + 432, align 256, addrspace 5)
- ; CHECK: [[LOAD112:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD110]](p5) :: (load 4 from %stack.0 + 436, align 256, addrspace 5)
- ; CHECK: [[LOAD113:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD111]](p5) :: (load 4 from %stack.0 + 440, align 256, addrspace 5)
- ; CHECK: [[LOAD114:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD112]](p5) :: (load 4 from %stack.0 + 444, align 256, addrspace 5)
- ; CHECK: [[LOAD115:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD113]](p5) :: (load 4 from %stack.0 + 448, align 256, addrspace 5)
- ; CHECK: [[LOAD116:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD114]](p5) :: (load 4 from %stack.0 + 452, align 256, addrspace 5)
- ; CHECK: [[LOAD117:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD115]](p5) :: (load 4 from %stack.0 + 456, align 256, addrspace 5)
- ; CHECK: [[LOAD118:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD116]](p5) :: (load 4 from %stack.0 + 460, align 256, addrspace 5)
- ; CHECK: [[LOAD119:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD117]](p5) :: (load 4 from %stack.0 + 464, align 256, addrspace 5)
- ; CHECK: [[LOAD120:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD118]](p5) :: (load 4 from %stack.0 + 468, align 256, addrspace 5)
- ; CHECK: [[LOAD121:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD119]](p5) :: (load 4 from %stack.0 + 472, align 256, addrspace 5)
- ; CHECK: [[LOAD122:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD120]](p5) :: (load 4 from %stack.0 + 476, align 256, addrspace 5)
- ; CHECK: [[LOAD123:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD121]](p5) :: (load 4 from %stack.0 + 480, align 256, addrspace 5)
- ; CHECK: [[LOAD124:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD122]](p5) :: (load 4 from %stack.0 + 484, align 256, addrspace 5)
- ; CHECK: [[LOAD125:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD123]](p5) :: (load 4 from %stack.0 + 488, align 256, addrspace 5)
- ; CHECK: [[LOAD126:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD124]](p5) :: (load 4 from %stack.0 + 492, align 256, addrspace 5)
- ; CHECK: [[LOAD127:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD125]](p5) :: (load 4 from %stack.0 + 496, align 256, addrspace 5)
- ; CHECK: [[LOAD128:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD126]](p5) :: (load 4 from %stack.0 + 500, align 256, addrspace 5)
- ; CHECK: [[LOAD129:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD127]](p5) :: (load 4 from %stack.0 + 504, align 256, addrspace 5)
- ; CHECK: [[LOAD130:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD128]](p5) :: (load 4 from %stack.0 + 508, align 256, addrspace 5)
- ; CHECK: [[LOAD131:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD129]](p5) :: (load 4 from %stack.0 + 512, align 256, addrspace 5)
- ; CHECK: [[COPY127:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
- ; CHECK: [[COPY128:%[0-9]+]]:_(p1) = COPY $vgpr2_vgpr3
- ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32)
- ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32)
- ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32), [[LOAD15]](s32)
- ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD16]](s32), [[LOAD17]](s32), [[LOAD18]](s32), [[LOAD19]](s32)
- ; CHECK: [[BUILD_VECTOR4:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD20]](s32), [[LOAD21]](s32), [[LOAD22]](s32), [[LOAD23]](s32)
- ; CHECK: [[BUILD_VECTOR5:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD24]](s32), [[LOAD25]](s32), [[LOAD26]](s32), [[LOAD27]](s32)
- ; CHECK: [[BUILD_VECTOR6:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD28]](s32), [[LOAD29]](s32), [[LOAD30]](s32), [[LOAD31]](s32)
- ; CHECK: [[BUILD_VECTOR7:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD32]](s32), [[LOAD33]](s32), [[LOAD34]](s32), [[LOAD35]](s32)
- ; CHECK: [[BUILD_VECTOR8:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD36]](s32), [[LOAD37]](s32), [[LOAD38]](s32), [[LOAD39]](s32)
- ; CHECK: [[BUILD_VECTOR9:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD40]](s32), [[LOAD41]](s32), [[LOAD42]](s32), [[LOAD43]](s32)
- ; CHECK: [[BUILD_VECTOR10:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD44]](s32), [[LOAD45]](s32), [[LOAD46]](s32), [[LOAD47]](s32)
- ; CHECK: [[BUILD_VECTOR11:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD48]](s32), [[LOAD49]](s32), [[LOAD50]](s32), [[LOAD51]](s32)
- ; CHECK: [[BUILD_VECTOR12:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD52]](s32), [[LOAD53]](s32), [[LOAD54]](s32), [[LOAD55]](s32)
- ; CHECK: [[BUILD_VECTOR13:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD56]](s32), [[LOAD57]](s32), [[LOAD58]](s32), [[LOAD59]](s32)
- ; CHECK: [[BUILD_VECTOR14:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD60]](s32), [[LOAD61]](s32), [[LOAD62]](s32), [[LOAD63]](s32)
- ; CHECK: [[BUILD_VECTOR15:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD64]](s32), [[LOAD65]](s32), [[LOAD66]](s32), [[LOAD67]](s32)
- ; CHECK: G_STORE [[BUILD_VECTOR]](<4 x s32>), [[COPY127]](p1) :: (store 16, align 4, addrspace 1)
- ; CHECK: [[C69:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
- ; CHECK: [[PTR_ADD131:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C69]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR1]](<4 x s32>), [[PTR_ADD131]](p1) :: (store 16 + 16, align 4, addrspace 1)
- ; CHECK: [[C70:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
- ; CHECK: [[PTR_ADD132:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C70]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR2]](<4 x s32>), [[PTR_ADD132]](p1) :: (store 16 + 32, align 4, addrspace 1)
- ; CHECK: [[C71:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
- ; CHECK: [[PTR_ADD133:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C71]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR3]](<4 x s32>), [[PTR_ADD133]](p1) :: (store 16 + 48, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD134:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C1]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR4]](<4 x s32>), [[PTR_ADD134]](p1) :: (store 16 + 64, align 4, addrspace 1)
- ; CHECK: [[C72:%[0-9]+]]:_(s64) = G_CONSTANT i64 80
- ; CHECK: [[PTR_ADD135:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C72]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR5]](<4 x s32>), [[PTR_ADD135]](p1) :: (store 16 + 80, align 4, addrspace 1)
- ; CHECK: [[C73:%[0-9]+]]:_(s64) = G_CONSTANT i64 96
- ; CHECK: [[PTR_ADD136:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C73]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR6]](<4 x s32>), [[PTR_ADD136]](p1) :: (store 16 + 96, align 4, addrspace 1)
- ; CHECK: [[C74:%[0-9]+]]:_(s64) = G_CONSTANT i64 112
- ; CHECK: [[PTR_ADD137:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C74]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR7]](<4 x s32>), [[PTR_ADD137]](p1) :: (store 16 + 112, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD138:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C2]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR8]](<4 x s32>), [[PTR_ADD138]](p1) :: (store 16 + 128, align 4, addrspace 1)
- ; CHECK: [[C75:%[0-9]+]]:_(s64) = G_CONSTANT i64 144
- ; CHECK: [[PTR_ADD139:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C75]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR9]](<4 x s32>), [[PTR_ADD139]](p1) :: (store 16 + 144, align 4, addrspace 1)
- ; CHECK: [[C76:%[0-9]+]]:_(s64) = G_CONSTANT i64 160
- ; CHECK: [[PTR_ADD140:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C76]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR10]](<4 x s32>), [[PTR_ADD140]](p1) :: (store 16 + 160, align 4, addrspace 1)
- ; CHECK: [[C77:%[0-9]+]]:_(s64) = G_CONSTANT i64 176
- ; CHECK: [[PTR_ADD141:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C77]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR11]](<4 x s32>), [[PTR_ADD141]](p1) :: (store 16 + 176, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD142:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C3]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR12]](<4 x s32>), [[PTR_ADD142]](p1) :: (store 16 + 192, align 4, addrspace 1)
- ; CHECK: [[C78:%[0-9]+]]:_(s64) = G_CONSTANT i64 208
- ; CHECK: [[PTR_ADD143:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C78]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR13]](<4 x s32>), [[PTR_ADD143]](p1) :: (store 16 + 208, align 4, addrspace 1)
- ; CHECK: [[C79:%[0-9]+]]:_(s64) = G_CONSTANT i64 224
- ; CHECK: [[PTR_ADD144:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C79]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR14]](<4 x s32>), [[PTR_ADD144]](p1) :: (store 16 + 224, align 4, addrspace 1)
- ; CHECK: [[C80:%[0-9]+]]:_(s64) = G_CONSTANT i64 240
- ; CHECK: [[PTR_ADD145:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY127]], [[C80]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR15]](<4 x s32>), [[PTR_ADD145]](p1) :: (store 16 + 240, align 4, addrspace 1)
- ; CHECK: [[BUILD_VECTOR16:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD68]](s32), [[LOAD69]](s32), [[LOAD70]](s32), [[LOAD71]](s32)
- ; CHECK: [[BUILD_VECTOR17:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD72]](s32), [[LOAD73]](s32), [[LOAD74]](s32), [[LOAD75]](s32)
- ; CHECK: [[BUILD_VECTOR18:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD76]](s32), [[LOAD77]](s32), [[LOAD78]](s32), [[LOAD79]](s32)
- ; CHECK: [[BUILD_VECTOR19:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD80]](s32), [[LOAD81]](s32), [[LOAD82]](s32), [[LOAD83]](s32)
- ; CHECK: [[BUILD_VECTOR20:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD84]](s32), [[LOAD85]](s32), [[LOAD86]](s32), [[LOAD87]](s32)
- ; CHECK: [[BUILD_VECTOR21:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD88]](s32), [[LOAD89]](s32), [[LOAD90]](s32), [[LOAD91]](s32)
- ; CHECK: [[BUILD_VECTOR22:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD92]](s32), [[LOAD93]](s32), [[LOAD94]](s32), [[LOAD95]](s32)
- ; CHECK: [[BUILD_VECTOR23:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD96]](s32), [[LOAD97]](s32), [[LOAD98]](s32), [[LOAD99]](s32)
- ; CHECK: [[BUILD_VECTOR24:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD100]](s32), [[LOAD101]](s32), [[LOAD102]](s32), [[LOAD103]](s32)
- ; CHECK: [[BUILD_VECTOR25:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD104]](s32), [[LOAD105]](s32), [[LOAD106]](s32), [[LOAD107]](s32)
- ; CHECK: [[BUILD_VECTOR26:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD108]](s32), [[LOAD109]](s32), [[LOAD110]](s32), [[LOAD111]](s32)
- ; CHECK: [[BUILD_VECTOR27:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD112]](s32), [[LOAD113]](s32), [[LOAD114]](s32), [[LOAD115]](s32)
- ; CHECK: [[BUILD_VECTOR28:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD116]](s32), [[LOAD117]](s32), [[LOAD118]](s32), [[LOAD119]](s32)
- ; CHECK: [[BUILD_VECTOR29:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD120]](s32), [[LOAD121]](s32), [[LOAD122]](s32), [[LOAD123]](s32)
- ; CHECK: [[BUILD_VECTOR30:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD124]](s32), [[LOAD125]](s32), [[LOAD126]](s32), [[LOAD127]](s32)
- ; CHECK: [[BUILD_VECTOR31:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD128]](s32), [[LOAD129]](s32), [[LOAD130]](s32), [[LOAD131]](s32)
- ; CHECK: G_STORE [[BUILD_VECTOR16]](<4 x s32>), [[COPY128]](p1) :: (store 16, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD146:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C69]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR17]](<4 x s32>), [[PTR_ADD146]](p1) :: (store 16 + 16, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD147:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C70]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR18]](<4 x s32>), [[PTR_ADD147]](p1) :: (store 16 + 32, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD148:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C71]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR19]](<4 x s32>), [[PTR_ADD148]](p1) :: (store 16 + 48, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD149:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C1]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR20]](<4 x s32>), [[PTR_ADD149]](p1) :: (store 16 + 64, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD150:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C72]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR21]](<4 x s32>), [[PTR_ADD150]](p1) :: (store 16 + 80, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD151:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C73]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR22]](<4 x s32>), [[PTR_ADD151]](p1) :: (store 16 + 96, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD152:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C74]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR23]](<4 x s32>), [[PTR_ADD152]](p1) :: (store 16 + 112, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD153:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C2]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR24]](<4 x s32>), [[PTR_ADD153]](p1) :: (store 16 + 128, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD154:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C75]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR25]](<4 x s32>), [[PTR_ADD154]](p1) :: (store 16 + 144, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD155:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C76]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR26]](<4 x s32>), [[PTR_ADD155]](p1) :: (store 16 + 160, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD156:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C77]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR27]](<4 x s32>), [[PTR_ADD156]](p1) :: (store 16 + 176, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD157:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C3]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR28]](<4 x s32>), [[PTR_ADD157]](p1) :: (store 16 + 192, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD158:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C78]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR29]](<4 x s32>), [[PTR_ADD158]](p1) :: (store 16 + 208, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD159:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C79]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR30]](<4 x s32>), [[PTR_ADD159]](p1) :: (store 16 + 224, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD160:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY128]], [[C80]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR31]](<4 x s32>), [[PTR_ADD160]](p1) :: (store 16 + 240, align 4, addrspace 1)
+ ; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF
+ ; CHECK: [[COPY1:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
+ ; CHECK: [[COPY2:%[0-9]+]]:_(p1) = COPY $vgpr2_vgpr3
+ ; CHECK: [[UV:%[0-9]+]]:_(<4 x s32>), [[UV1:%[0-9]+]]:_(<4 x s32>), [[UV2:%[0-9]+]]:_(<4 x s32>), [[UV3:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
+ ; CHECK: [[UV4:%[0-9]+]]:_(<4 x s32>), [[UV5:%[0-9]+]]:_(<4 x s32>), [[UV6:%[0-9]+]]:_(<4 x s32>), [[UV7:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
+ ; CHECK: [[UV8:%[0-9]+]]:_(<4 x s32>), [[UV9:%[0-9]+]]:_(<4 x s32>), [[UV10:%[0-9]+]]:_(<4 x s32>), [[UV11:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
+ ; CHECK: [[UV12:%[0-9]+]]:_(<4 x s32>), [[UV13:%[0-9]+]]:_(<4 x s32>), [[UV14:%[0-9]+]]:_(<4 x s32>), [[UV15:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
+ ; CHECK: G_STORE [[UV]](<4 x s32>), [[COPY1]](p1) :: (store 16, align 4, addrspace 1)
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
+ ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C]](s64)
+ ; CHECK: G_STORE [[UV1]](<4 x s32>), [[PTR_ADD]](p1) :: (store 16 + 16, align 4, addrspace 1)
+ ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C1]](s64)
+ ; CHECK: G_STORE [[UV2]](<4 x s32>), [[PTR_ADD1]](p1) :: (store 16 + 32, align 4, addrspace 1)
+ ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
+ ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C2]](s64)
+ ; CHECK: G_STORE [[UV3]](<4 x s32>), [[PTR_ADD2]](p1) :: (store 16 + 48, align 4, addrspace 1)
+ ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
+ ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C3]](s64)
+ ; CHECK: G_STORE [[UV4]](<4 x s32>), [[PTR_ADD3]](p1) :: (store 16 + 64, align 4, addrspace 1)
+ ; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 80
+ ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C4]](s64)
+ ; CHECK: G_STORE [[UV5]](<4 x s32>), [[PTR_ADD4]](p1) :: (store 16 + 80, align 4, addrspace 1)
+ ; CHECK: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 96
+ ; CHECK: [[PTR_ADD5:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C5]](s64)
+ ; CHECK: G_STORE [[UV6]](<4 x s32>), [[PTR_ADD5]](p1) :: (store 16 + 96, align 4, addrspace 1)
+ ; CHECK: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 112
+ ; CHECK: [[PTR_ADD6:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C6]](s64)
+ ; CHECK: G_STORE [[UV7]](<4 x s32>), [[PTR_ADD6]](p1) :: (store 16 + 112, align 4, addrspace 1)
+ ; CHECK: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 128
+ ; CHECK: [[PTR_ADD7:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C7]](s64)
+ ; CHECK: G_STORE [[UV8]](<4 x s32>), [[PTR_ADD7]](p1) :: (store 16 + 128, align 4, addrspace 1)
+ ; CHECK: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 144
+ ; CHECK: [[PTR_ADD8:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C8]](s64)
+ ; CHECK: G_STORE [[UV9]](<4 x s32>), [[PTR_ADD8]](p1) :: (store 16 + 144, align 4, addrspace 1)
+ ; CHECK: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 160
+ ; CHECK: [[PTR_ADD9:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C9]](s64)
+ ; CHECK: G_STORE [[UV10]](<4 x s32>), [[PTR_ADD9]](p1) :: (store 16 + 160, align 4, addrspace 1)
+ ; CHECK: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 176
+ ; CHECK: [[PTR_ADD10:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C10]](s64)
+ ; CHECK: G_STORE [[UV11]](<4 x s32>), [[PTR_ADD10]](p1) :: (store 16 + 176, align 4, addrspace 1)
+ ; CHECK: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 192
+ ; CHECK: [[PTR_ADD11:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C11]](s64)
+ ; CHECK: G_STORE [[UV12]](<4 x s32>), [[PTR_ADD11]](p1) :: (store 16 + 192, align 4, addrspace 1)
+ ; CHECK: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 208
+ ; CHECK: [[PTR_ADD12:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C12]](s64)
+ ; CHECK: G_STORE [[UV13]](<4 x s32>), [[PTR_ADD12]](p1) :: (store 16 + 208, align 4, addrspace 1)
+ ; CHECK: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 224
+ ; CHECK: [[PTR_ADD13:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C13]](s64)
+ ; CHECK: G_STORE [[UV14]](<4 x s32>), [[PTR_ADD13]](p1) :: (store 16 + 224, align 4, addrspace 1)
+ ; CHECK: [[C14:%[0-9]+]]:_(s64) = G_CONSTANT i64 240
+ ; CHECK: [[PTR_ADD14:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C14]](s64)
+ ; CHECK: G_STORE [[UV15]](<4 x s32>), [[PTR_ADD14]](p1) :: (store 16 + 240, align 4, addrspace 1)
+ ; CHECK: [[UV16:%[0-9]+]]:_(<4 x s32>), [[UV17:%[0-9]+]]:_(<4 x s32>), [[UV18:%[0-9]+]]:_(<4 x s32>), [[UV19:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
+ ; CHECK: [[UV20:%[0-9]+]]:_(<4 x s32>), [[UV21:%[0-9]+]]:_(<4 x s32>), [[UV22:%[0-9]+]]:_(<4 x s32>), [[UV23:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
+ ; CHECK: [[UV24:%[0-9]+]]:_(<4 x s32>), [[UV25:%[0-9]+]]:_(<4 x s32>), [[UV26:%[0-9]+]]:_(<4 x s32>), [[UV27:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
+ ; CHECK: [[UV28:%[0-9]+]]:_(<4 x s32>), [[UV29:%[0-9]+]]:_(<4 x s32>), [[UV30:%[0-9]+]]:_(<4 x s32>), [[UV31:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[DEF]](<16 x s32>)
+ ; CHECK: G_STORE [[UV16]](<4 x s32>), [[COPY2]](p1) :: (store 16, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD15:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C]](s64)
+ ; CHECK: G_STORE [[UV17]](<4 x s32>), [[PTR_ADD15]](p1) :: (store 16 + 16, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD16:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C1]](s64)
+ ; CHECK: G_STORE [[UV18]](<4 x s32>), [[PTR_ADD16]](p1) :: (store 16 + 32, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD17:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C2]](s64)
+ ; CHECK: G_STORE [[UV19]](<4 x s32>), [[PTR_ADD17]](p1) :: (store 16 + 48, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD18:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C3]](s64)
+ ; CHECK: G_STORE [[UV20]](<4 x s32>), [[PTR_ADD18]](p1) :: (store 16 + 64, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD19:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C4]](s64)
+ ; CHECK: G_STORE [[UV21]](<4 x s32>), [[PTR_ADD19]](p1) :: (store 16 + 80, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD20:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C5]](s64)
+ ; CHECK: G_STORE [[UV22]](<4 x s32>), [[PTR_ADD20]](p1) :: (store 16 + 96, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD21:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C6]](s64)
+ ; CHECK: G_STORE [[UV23]](<4 x s32>), [[PTR_ADD21]](p1) :: (store 16 + 112, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD22:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C7]](s64)
+ ; CHECK: G_STORE [[UV24]](<4 x s32>), [[PTR_ADD22]](p1) :: (store 16 + 128, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD23:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C8]](s64)
+ ; CHECK: G_STORE [[UV25]](<4 x s32>), [[PTR_ADD23]](p1) :: (store 16 + 144, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD24:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C9]](s64)
+ ; CHECK: G_STORE [[UV26]](<4 x s32>), [[PTR_ADD24]](p1) :: (store 16 + 160, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD25:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C10]](s64)
+ ; CHECK: G_STORE [[UV27]](<4 x s32>), [[PTR_ADD25]](p1) :: (store 16 + 176, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD26:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C11]](s64)
+ ; CHECK: G_STORE [[UV28]](<4 x s32>), [[PTR_ADD26]](p1) :: (store 16 + 192, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD27:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C12]](s64)
+ ; CHECK: G_STORE [[UV29]](<4 x s32>), [[PTR_ADD27]](p1) :: (store 16 + 208, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD28:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C13]](s64)
+ ; CHECK: G_STORE [[UV30]](<4 x s32>), [[PTR_ADD28]](p1) :: (store 16 + 224, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD29:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY2]], [[C14]](s64)
+ ; CHECK: G_STORE [[UV31]](<4 x s32>), [[PTR_ADD29]](p1) :: (store 16 + 240, align 4, addrspace 1)
%0:_(p1) = COPY $sgpr0_sgpr1
%1:_(s32) = G_CONSTANT i32 64
%2:_(<64 x s32>) = G_LOAD %0 :: (load 256, align 4, addrspace 4)
@@ -929,390 +311,55 @@ body: |
; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64)
; CHECK: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load 64 + 192, align 4, addrspace 4)
; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 12345
- ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0
- ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>)
- ; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<16 x s32>)
- ; CHECK: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32), [[UV40:%[0-9]+]]:_(s32), [[UV41:%[0-9]+]]:_(s32), [[UV42:%[0-9]+]]:_(s32), [[UV43:%[0-9]+]]:_(s32), [[UV44:%[0-9]+]]:_(s32), [[UV45:%[0-9]+]]:_(s32), [[UV46:%[0-9]+]]:_(s32), [[UV47:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD2]](<16 x s32>)
- ; CHECK: [[UV48:%[0-9]+]]:_(s32), [[UV49:%[0-9]+]]:_(s32), [[UV50:%[0-9]+]]:_(s32), [[UV51:%[0-9]+]]:_(s32), [[UV52:%[0-9]+]]:_(s32), [[UV53:%[0-9]+]]:_(s32), [[UV54:%[0-9]+]]:_(s32), [[UV55:%[0-9]+]]:_(s32), [[UV56:%[0-9]+]]:_(s32), [[UV57:%[0-9]+]]:_(s32), [[UV58:%[0-9]+]]:_(s32), [[UV59:%[0-9]+]]:_(s32), [[UV60:%[0-9]+]]:_(s32), [[UV61:%[0-9]+]]:_(s32), [[UV62:%[0-9]+]]:_(s32), [[UV63:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD3]](<16 x s32>)
- ; CHECK: G_STORE [[UV]](s32), [[FRAME_INDEX]](p5) :: (store 4 into %stack.0, align 256, addrspace 5)
- ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
- ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C4]](s32)
- ; CHECK: [[COPY1:%[0-9]+]]:_(p5) = COPY [[PTR_ADD3]](p5)
- ; CHECK: G_STORE [[UV1]](s32), [[COPY1]](p5) :: (store 4 into %stack.0 + 4, align 256, addrspace 5)
- ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
- ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C5]](s32)
- ; CHECK: [[COPY2:%[0-9]+]]:_(p5) = COPY [[PTR_ADD4]](p5)
- ; CHECK: G_STORE [[UV2]](s32), [[COPY2]](p5) :: (store 4 into %stack.0 + 8, align 256, addrspace 5)
- ; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
- ; CHECK: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C6]](s32)
- ; CHECK: [[COPY3:%[0-9]+]]:_(p5) = COPY [[PTR_ADD5]](p5)
- ; CHECK: G_STORE [[UV3]](s32), [[COPY3]](p5) :: (store 4 into %stack.0 + 12, align 256, addrspace 5)
- ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
- ; CHECK: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C7]](s32)
- ; CHECK: [[COPY4:%[0-9]+]]:_(p5) = COPY [[PTR_ADD6]](p5)
- ; CHECK: G_STORE [[UV4]](s32), [[COPY4]](p5) :: (store 4 into %stack.0 + 16, align 256, addrspace 5)
- ; CHECK: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
- ; CHECK: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C8]](s32)
- ; CHECK: [[COPY5:%[0-9]+]]:_(p5) = COPY [[PTR_ADD7]](p5)
- ; CHECK: G_STORE [[UV5]](s32), [[COPY5]](p5) :: (store 4 into %stack.0 + 20, align 256, addrspace 5)
- ; CHECK: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
- ; CHECK: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C9]](s32)
- ; CHECK: [[COPY6:%[0-9]+]]:_(p5) = COPY [[PTR_ADD8]](p5)
- ; CHECK: G_STORE [[UV6]](s32), [[COPY6]](p5) :: (store 4 into %stack.0 + 24, align 256, addrspace 5)
- ; CHECK: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
- ; CHECK: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C10]](s32)
- ; CHECK: [[COPY7:%[0-9]+]]:_(p5) = COPY [[PTR_ADD9]](p5)
- ; CHECK: G_STORE [[UV7]](s32), [[COPY7]](p5) :: (store 4 into %stack.0 + 28, align 256, addrspace 5)
- ; CHECK: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C11]](s32)
- ; CHECK: [[COPY8:%[0-9]+]]:_(p5) = COPY [[PTR_ADD10]](p5)
- ; CHECK: G_STORE [[UV8]](s32), [[COPY8]](p5) :: (store 4 into %stack.0 + 32, align 256, addrspace 5)
- ; CHECK: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 36
- ; CHECK: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C12]](s32)
- ; CHECK: [[COPY9:%[0-9]+]]:_(p5) = COPY [[PTR_ADD11]](p5)
- ; CHECK: G_STORE [[UV9]](s32), [[COPY9]](p5) :: (store 4 into %stack.0 + 36, align 256, addrspace 5)
- ; CHECK: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 40
- ; CHECK: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C13]](s32)
- ; CHECK: [[COPY10:%[0-9]+]]:_(p5) = COPY [[PTR_ADD12]](p5)
- ; CHECK: G_STORE [[UV10]](s32), [[COPY10]](p5) :: (store 4 into %stack.0 + 40, align 256, addrspace 5)
- ; CHECK: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 44
- ; CHECK: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C14]](s32)
- ; CHECK: [[COPY11:%[0-9]+]]:_(p5) = COPY [[PTR_ADD13]](p5)
- ; CHECK: G_STORE [[UV11]](s32), [[COPY11]](p5) :: (store 4 into %stack.0 + 44, align 256, addrspace 5)
- ; CHECK: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 48
- ; CHECK: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C15]](s32)
- ; CHECK: [[COPY12:%[0-9]+]]:_(p5) = COPY [[PTR_ADD14]](p5)
- ; CHECK: G_STORE [[UV12]](s32), [[COPY12]](p5) :: (store 4 into %stack.0 + 48, align 256, addrspace 5)
- ; CHECK: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 52
- ; CHECK: [[PTR_ADD15:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C16]](s32)
- ; CHECK: [[COPY13:%[0-9]+]]:_(p5) = COPY [[PTR_ADD15]](p5)
- ; CHECK: G_STORE [[UV13]](s32), [[COPY13]](p5) :: (store 4 into %stack.0 + 52, align 256, addrspace 5)
- ; CHECK: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 56
- ; CHECK: [[PTR_ADD16:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C17]](s32)
- ; CHECK: [[COPY14:%[0-9]+]]:_(p5) = COPY [[PTR_ADD16]](p5)
- ; CHECK: G_STORE [[UV14]](s32), [[COPY14]](p5) :: (store 4 into %stack.0 + 56, align 256, addrspace 5)
- ; CHECK: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 60
- ; CHECK: [[PTR_ADD17:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C18]](s32)
- ; CHECK: [[COPY15:%[0-9]+]]:_(p5) = COPY [[PTR_ADD17]](p5)
- ; CHECK: G_STORE [[UV15]](s32), [[COPY15]](p5) :: (store 4 into %stack.0 + 60, align 256, addrspace 5)
- ; CHECK: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
- ; CHECK: [[PTR_ADD18:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C19]](s32)
- ; CHECK: [[COPY16:%[0-9]+]]:_(p5) = COPY [[PTR_ADD18]](p5)
- ; CHECK: G_STORE [[UV16]](s32), [[COPY16]](p5) :: (store 4 into %stack.0 + 64, align 256, addrspace 5)
- ; CHECK: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 68
- ; CHECK: [[PTR_ADD19:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C20]](s32)
- ; CHECK: [[COPY17:%[0-9]+]]:_(p5) = COPY [[PTR_ADD19]](p5)
- ; CHECK: G_STORE [[UV17]](s32), [[COPY17]](p5) :: (store 4 into %stack.0 + 68, align 256, addrspace 5)
- ; CHECK: [[C21:%[0-9]+]]:_(s32) = G_CONSTANT i32 72
- ; CHECK: [[PTR_ADD20:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C21]](s32)
- ; CHECK: [[COPY18:%[0-9]+]]:_(p5) = COPY [[PTR_ADD20]](p5)
- ; CHECK: G_STORE [[UV18]](s32), [[COPY18]](p5) :: (store 4 into %stack.0 + 72, align 256, addrspace 5)
- ; CHECK: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 76
- ; CHECK: [[PTR_ADD21:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C22]](s32)
- ; CHECK: [[COPY19:%[0-9]+]]:_(p5) = COPY [[PTR_ADD21]](p5)
- ; CHECK: G_STORE [[UV19]](s32), [[COPY19]](p5) :: (store 4 into %stack.0 + 76, align 256, addrspace 5)
- ; CHECK: [[C23:%[0-9]+]]:_(s32) = G_CONSTANT i32 80
- ; CHECK: [[PTR_ADD22:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C23]](s32)
- ; CHECK: [[COPY20:%[0-9]+]]:_(p5) = COPY [[PTR_ADD22]](p5)
- ; CHECK: G_STORE [[UV20]](s32), [[COPY20]](p5) :: (store 4 into %stack.0 + 80, align 256, addrspace 5)
- ; CHECK: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 84
- ; CHECK: [[PTR_ADD23:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C24]](s32)
- ; CHECK: [[COPY21:%[0-9]+]]:_(p5) = COPY [[PTR_ADD23]](p5)
- ; CHECK: G_STORE [[UV21]](s32), [[COPY21]](p5) :: (store 4 into %stack.0 + 84, align 256, addrspace 5)
- ; CHECK: [[C25:%[0-9]+]]:_(s32) = G_CONSTANT i32 88
- ; CHECK: [[PTR_ADD24:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C25]](s32)
- ; CHECK: [[COPY22:%[0-9]+]]:_(p5) = COPY [[PTR_ADD24]](p5)
- ; CHECK: G_STORE [[UV22]](s32), [[COPY22]](p5) :: (store 4 into %stack.0 + 88, align 256, addrspace 5)
- ; CHECK: [[C26:%[0-9]+]]:_(s32) = G_CONSTANT i32 92
- ; CHECK: [[PTR_ADD25:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C26]](s32)
- ; CHECK: [[COPY23:%[0-9]+]]:_(p5) = COPY [[PTR_ADD25]](p5)
- ; CHECK: G_STORE [[UV23]](s32), [[COPY23]](p5) :: (store 4 into %stack.0 + 92, align 256, addrspace 5)
- ; CHECK: [[C27:%[0-9]+]]:_(s32) = G_CONSTANT i32 96
- ; CHECK: [[PTR_ADD26:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C27]](s32)
- ; CHECK: [[COPY24:%[0-9]+]]:_(p5) = COPY [[PTR_ADD26]](p5)
- ; CHECK: G_STORE [[UV24]](s32), [[COPY24]](p5) :: (store 4 into %stack.0 + 96, align 256, addrspace 5)
- ; CHECK: [[C28:%[0-9]+]]:_(s32) = G_CONSTANT i32 100
- ; CHECK: [[PTR_ADD27:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C28]](s32)
- ; CHECK: [[COPY25:%[0-9]+]]:_(p5) = COPY [[PTR_ADD27]](p5)
- ; CHECK: G_STORE [[UV25]](s32), [[COPY25]](p5) :: (store 4 into %stack.0 + 100, align 256, addrspace 5)
- ; CHECK: [[C29:%[0-9]+]]:_(s32) = G_CONSTANT i32 104
- ; CHECK: [[PTR_ADD28:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C29]](s32)
- ; CHECK: [[COPY26:%[0-9]+]]:_(p5) = COPY [[PTR_ADD28]](p5)
- ; CHECK: G_STORE [[UV26]](s32), [[COPY26]](p5) :: (store 4 into %stack.0 + 104, align 256, addrspace 5)
- ; CHECK: [[C30:%[0-9]+]]:_(s32) = G_CONSTANT i32 108
- ; CHECK: [[PTR_ADD29:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C30]](s32)
- ; CHECK: [[COPY27:%[0-9]+]]:_(p5) = COPY [[PTR_ADD29]](p5)
- ; CHECK: G_STORE [[UV27]](s32), [[COPY27]](p5) :: (store 4 into %stack.0 + 108, align 256, addrspace 5)
- ; CHECK: [[C31:%[0-9]+]]:_(s32) = G_CONSTANT i32 112
- ; CHECK: [[PTR_ADD30:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C31]](s32)
- ; CHECK: [[COPY28:%[0-9]+]]:_(p5) = COPY [[PTR_ADD30]](p5)
- ; CHECK: G_STORE [[UV28]](s32), [[COPY28]](p5) :: (store 4 into %stack.0 + 112, align 256, addrspace 5)
- ; CHECK: [[C32:%[0-9]+]]:_(s32) = G_CONSTANT i32 116
- ; CHECK: [[PTR_ADD31:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C32]](s32)
- ; CHECK: [[COPY29:%[0-9]+]]:_(p5) = COPY [[PTR_ADD31]](p5)
- ; CHECK: G_STORE [[UV29]](s32), [[COPY29]](p5) :: (store 4 into %stack.0 + 116, align 256, addrspace 5)
- ; CHECK: [[C33:%[0-9]+]]:_(s32) = G_CONSTANT i32 120
- ; CHECK: [[PTR_ADD32:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C33]](s32)
- ; CHECK: [[COPY30:%[0-9]+]]:_(p5) = COPY [[PTR_ADD32]](p5)
- ; CHECK: G_STORE [[UV30]](s32), [[COPY30]](p5) :: (store 4 into %stack.0 + 120, align 256, addrspace 5)
- ; CHECK: [[C34:%[0-9]+]]:_(s32) = G_CONSTANT i32 124
- ; CHECK: [[PTR_ADD33:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C34]](s32)
- ; CHECK: [[COPY31:%[0-9]+]]:_(p5) = COPY [[PTR_ADD33]](p5)
- ; CHECK: G_STORE [[UV31]](s32), [[COPY31]](p5) :: (store 4 into %stack.0 + 124, align 256, addrspace 5)
- ; CHECK: [[C35:%[0-9]+]]:_(s32) = G_CONSTANT i32 128
- ; CHECK: [[PTR_ADD34:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C35]](s32)
- ; CHECK: [[COPY32:%[0-9]+]]:_(p5) = COPY [[PTR_ADD34]](p5)
- ; CHECK: G_STORE [[UV32]](s32), [[COPY32]](p5) :: (store 4 into %stack.0 + 128, align 256, addrspace 5)
- ; CHECK: [[C36:%[0-9]+]]:_(s32) = G_CONSTANT i32 132
- ; CHECK: [[PTR_ADD35:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C36]](s32)
- ; CHECK: [[COPY33:%[0-9]+]]:_(p5) = COPY [[PTR_ADD35]](p5)
- ; CHECK: G_STORE [[UV33]](s32), [[COPY33]](p5) :: (store 4 into %stack.0 + 132, align 256, addrspace 5)
- ; CHECK: [[C37:%[0-9]+]]:_(s32) = G_CONSTANT i32 136
- ; CHECK: [[PTR_ADD36:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C37]](s32)
- ; CHECK: [[COPY34:%[0-9]+]]:_(p5) = COPY [[PTR_ADD36]](p5)
- ; CHECK: G_STORE [[UV34]](s32), [[COPY34]](p5) :: (store 4 into %stack.0 + 136, align 256, addrspace 5)
- ; CHECK: [[C38:%[0-9]+]]:_(s32) = G_CONSTANT i32 140
- ; CHECK: [[PTR_ADD37:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C38]](s32)
- ; CHECK: [[COPY35:%[0-9]+]]:_(p5) = COPY [[PTR_ADD37]](p5)
- ; CHECK: G_STORE [[UV35]](s32), [[COPY35]](p5) :: (store 4 into %stack.0 + 140, align 256, addrspace 5)
- ; CHECK: [[C39:%[0-9]+]]:_(s32) = G_CONSTANT i32 144
- ; CHECK: [[PTR_ADD38:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C39]](s32)
- ; CHECK: [[COPY36:%[0-9]+]]:_(p5) = COPY [[PTR_ADD38]](p5)
- ; CHECK: G_STORE [[UV36]](s32), [[COPY36]](p5) :: (store 4 into %stack.0 + 144, align 256, addrspace 5)
- ; CHECK: [[C40:%[0-9]+]]:_(s32) = G_CONSTANT i32 148
- ; CHECK: [[PTR_ADD39:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C40]](s32)
- ; CHECK: [[COPY37:%[0-9]+]]:_(p5) = COPY [[PTR_ADD39]](p5)
- ; CHECK: G_STORE [[UV37]](s32), [[COPY37]](p5) :: (store 4 into %stack.0 + 148, align 256, addrspace 5)
- ; CHECK: [[C41:%[0-9]+]]:_(s32) = G_CONSTANT i32 152
- ; CHECK: [[PTR_ADD40:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C41]](s32)
- ; CHECK: [[COPY38:%[0-9]+]]:_(p5) = COPY [[PTR_ADD40]](p5)
- ; CHECK: G_STORE [[UV38]](s32), [[COPY38]](p5) :: (store 4 into %stack.0 + 152, align 256, addrspace 5)
- ; CHECK: [[C42:%[0-9]+]]:_(s32) = G_CONSTANT i32 156
- ; CHECK: [[PTR_ADD41:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C42]](s32)
- ; CHECK: [[COPY39:%[0-9]+]]:_(p5) = COPY [[PTR_ADD41]](p5)
- ; CHECK: G_STORE [[UV39]](s32), [[COPY39]](p5) :: (store 4 into %stack.0 + 156, align 256, addrspace 5)
- ; CHECK: [[C43:%[0-9]+]]:_(s32) = G_CONSTANT i32 160
- ; CHECK: [[PTR_ADD42:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C43]](s32)
- ; CHECK: [[COPY40:%[0-9]+]]:_(p5) = COPY [[PTR_ADD42]](p5)
- ; CHECK: G_STORE [[UV40]](s32), [[COPY40]](p5) :: (store 4 into %stack.0 + 160, align 256, addrspace 5)
- ; CHECK: [[C44:%[0-9]+]]:_(s32) = G_CONSTANT i32 164
- ; CHECK: [[PTR_ADD43:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C44]](s32)
- ; CHECK: [[COPY41:%[0-9]+]]:_(p5) = COPY [[PTR_ADD43]](p5)
- ; CHECK: G_STORE [[UV41]](s32), [[COPY41]](p5) :: (store 4 into %stack.0 + 164, align 256, addrspace 5)
- ; CHECK: [[C45:%[0-9]+]]:_(s32) = G_CONSTANT i32 168
- ; CHECK: [[PTR_ADD44:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C45]](s32)
- ; CHECK: [[COPY42:%[0-9]+]]:_(p5) = COPY [[PTR_ADD44]](p5)
- ; CHECK: G_STORE [[UV42]](s32), [[COPY42]](p5) :: (store 4 into %stack.0 + 168, align 256, addrspace 5)
- ; CHECK: [[C46:%[0-9]+]]:_(s32) = G_CONSTANT i32 172
- ; CHECK: [[PTR_ADD45:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C46]](s32)
- ; CHECK: [[COPY43:%[0-9]+]]:_(p5) = COPY [[PTR_ADD45]](p5)
- ; CHECK: G_STORE [[UV43]](s32), [[COPY43]](p5) :: (store 4 into %stack.0 + 172, align 256, addrspace 5)
- ; CHECK: [[C47:%[0-9]+]]:_(s32) = G_CONSTANT i32 176
- ; CHECK: [[PTR_ADD46:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C47]](s32)
- ; CHECK: [[COPY44:%[0-9]+]]:_(p5) = COPY [[PTR_ADD46]](p5)
- ; CHECK: G_STORE [[UV44]](s32), [[COPY44]](p5) :: (store 4 into %stack.0 + 176, align 256, addrspace 5)
- ; CHECK: [[C48:%[0-9]+]]:_(s32) = G_CONSTANT i32 180
- ; CHECK: [[PTR_ADD47:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C48]](s32)
- ; CHECK: [[COPY45:%[0-9]+]]:_(p5) = COPY [[PTR_ADD47]](p5)
- ; CHECK: G_STORE [[UV45]](s32), [[COPY45]](p5) :: (store 4 into %stack.0 + 180, align 256, addrspace 5)
- ; CHECK: [[C49:%[0-9]+]]:_(s32) = G_CONSTANT i32 184
- ; CHECK: [[PTR_ADD48:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C49]](s32)
- ; CHECK: [[COPY46:%[0-9]+]]:_(p5) = COPY [[PTR_ADD48]](p5)
- ; CHECK: G_STORE [[UV46]](s32), [[COPY46]](p5) :: (store 4 into %stack.0 + 184, align 256, addrspace 5)
- ; CHECK: [[C50:%[0-9]+]]:_(s32) = G_CONSTANT i32 188
- ; CHECK: [[PTR_ADD49:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C50]](s32)
- ; CHECK: [[COPY47:%[0-9]+]]:_(p5) = COPY [[PTR_ADD49]](p5)
- ; CHECK: G_STORE [[UV47]](s32), [[COPY47]](p5) :: (store 4 into %stack.0 + 188, align 256, addrspace 5)
- ; CHECK: [[C51:%[0-9]+]]:_(s32) = G_CONSTANT i32 192
- ; CHECK: [[PTR_ADD50:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C51]](s32)
- ; CHECK: [[COPY48:%[0-9]+]]:_(p5) = COPY [[PTR_ADD50]](p5)
- ; CHECK: G_STORE [[UV48]](s32), [[COPY48]](p5) :: (store 4 into %stack.0 + 192, align 256, addrspace 5)
- ; CHECK: [[C52:%[0-9]+]]:_(s32) = G_CONSTANT i32 196
- ; CHECK: [[PTR_ADD51:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C52]](s32)
- ; CHECK: [[COPY49:%[0-9]+]]:_(p5) = COPY [[PTR_ADD51]](p5)
- ; CHECK: G_STORE [[UV49]](s32), [[COPY49]](p5) :: (store 4 into %stack.0 + 196, align 256, addrspace 5)
- ; CHECK: [[C53:%[0-9]+]]:_(s32) = G_CONSTANT i32 200
- ; CHECK: [[PTR_ADD52:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C53]](s32)
- ; CHECK: [[COPY50:%[0-9]+]]:_(p5) = COPY [[PTR_ADD52]](p5)
- ; CHECK: G_STORE [[UV50]](s32), [[COPY50]](p5) :: (store 4 into %stack.0 + 200, align 256, addrspace 5)
- ; CHECK: [[C54:%[0-9]+]]:_(s32) = G_CONSTANT i32 204
- ; CHECK: [[PTR_ADD53:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C54]](s32)
- ; CHECK: [[COPY51:%[0-9]+]]:_(p5) = COPY [[PTR_ADD53]](p5)
- ; CHECK: G_STORE [[UV51]](s32), [[COPY51]](p5) :: (store 4 into %stack.0 + 204, align 256, addrspace 5)
- ; CHECK: [[C55:%[0-9]+]]:_(s32) = G_CONSTANT i32 208
- ; CHECK: [[PTR_ADD54:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C55]](s32)
- ; CHECK: [[COPY52:%[0-9]+]]:_(p5) = COPY [[PTR_ADD54]](p5)
- ; CHECK: G_STORE [[UV52]](s32), [[COPY52]](p5) :: (store 4 into %stack.0 + 208, align 256, addrspace 5)
- ; CHECK: [[C56:%[0-9]+]]:_(s32) = G_CONSTANT i32 212
- ; CHECK: [[PTR_ADD55:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C56]](s32)
- ; CHECK: [[COPY53:%[0-9]+]]:_(p5) = COPY [[PTR_ADD55]](p5)
- ; CHECK: G_STORE [[UV53]](s32), [[COPY53]](p5) :: (store 4 into %stack.0 + 212, align 256, addrspace 5)
- ; CHECK: [[C57:%[0-9]+]]:_(s32) = G_CONSTANT i32 216
- ; CHECK: [[PTR_ADD56:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C57]](s32)
- ; CHECK: [[COPY54:%[0-9]+]]:_(p5) = COPY [[PTR_ADD56]](p5)
- ; CHECK: G_STORE [[UV54]](s32), [[COPY54]](p5) :: (store 4 into %stack.0 + 216, align 256, addrspace 5)
- ; CHECK: [[C58:%[0-9]+]]:_(s32) = G_CONSTANT i32 220
- ; CHECK: [[PTR_ADD57:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C58]](s32)
- ; CHECK: [[COPY55:%[0-9]+]]:_(p5) = COPY [[PTR_ADD57]](p5)
- ; CHECK: G_STORE [[UV55]](s32), [[COPY55]](p5) :: (store 4 into %stack.0 + 220, align 256, addrspace 5)
- ; CHECK: [[C59:%[0-9]+]]:_(s32) = G_CONSTANT i32 224
- ; CHECK: [[PTR_ADD58:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C59]](s32)
- ; CHECK: [[COPY56:%[0-9]+]]:_(p5) = COPY [[PTR_ADD58]](p5)
- ; CHECK: G_STORE [[UV56]](s32), [[COPY56]](p5) :: (store 4 into %stack.0 + 224, align 256, addrspace 5)
- ; CHECK: [[C60:%[0-9]+]]:_(s32) = G_CONSTANT i32 228
- ; CHECK: [[PTR_ADD59:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C60]](s32)
- ; CHECK: [[COPY57:%[0-9]+]]:_(p5) = COPY [[PTR_ADD59]](p5)
- ; CHECK: G_STORE [[UV57]](s32), [[COPY57]](p5) :: (store 4 into %stack.0 + 228, align 256, addrspace 5)
- ; CHECK: [[C61:%[0-9]+]]:_(s32) = G_CONSTANT i32 232
- ; CHECK: [[PTR_ADD60:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C61]](s32)
- ; CHECK: [[COPY58:%[0-9]+]]:_(p5) = COPY [[PTR_ADD60]](p5)
- ; CHECK: G_STORE [[UV58]](s32), [[COPY58]](p5) :: (store 4 into %stack.0 + 232, align 256, addrspace 5)
- ; CHECK: [[C62:%[0-9]+]]:_(s32) = G_CONSTANT i32 236
- ; CHECK: [[PTR_ADD61:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C62]](s32)
- ; CHECK: [[COPY59:%[0-9]+]]:_(p5) = COPY [[PTR_ADD61]](p5)
- ; CHECK: G_STORE [[UV59]](s32), [[COPY59]](p5) :: (store 4 into %stack.0 + 236, align 256, addrspace 5)
- ; CHECK: [[C63:%[0-9]+]]:_(s32) = G_CONSTANT i32 240
- ; CHECK: [[PTR_ADD62:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C63]](s32)
- ; CHECK: [[COPY60:%[0-9]+]]:_(p5) = COPY [[PTR_ADD62]](p5)
- ; CHECK: G_STORE [[UV60]](s32), [[COPY60]](p5) :: (store 4 into %stack.0 + 240, align 256, addrspace 5)
- ; CHECK: [[C64:%[0-9]+]]:_(s32) = G_CONSTANT i32 244
- ; CHECK: [[PTR_ADD63:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C64]](s32)
- ; CHECK: [[COPY61:%[0-9]+]]:_(p5) = COPY [[PTR_ADD63]](p5)
- ; CHECK: G_STORE [[UV61]](s32), [[COPY61]](p5) :: (store 4 into %stack.0 + 244, align 256, addrspace 5)
- ; CHECK: [[C65:%[0-9]+]]:_(s32) = G_CONSTANT i32 248
- ; CHECK: [[PTR_ADD64:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C65]](s32)
- ; CHECK: [[COPY62:%[0-9]+]]:_(p5) = COPY [[PTR_ADD64]](p5)
- ; CHECK: G_STORE [[UV62]](s32), [[COPY62]](p5) :: (store 4 into %stack.0 + 248, align 256, addrspace 5)
- ; CHECK: [[C66:%[0-9]+]]:_(s32) = G_CONSTANT i32 252
- ; CHECK: [[PTR_ADD65:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C66]](s32)
- ; CHECK: [[COPY63:%[0-9]+]]:_(p5) = COPY [[PTR_ADD65]](p5)
- ; CHECK: G_STORE [[UV63]](s32), [[COPY63]](p5) :: (store 4 into %stack.0 + 252, align 256, addrspace 5)
- ; CHECK: G_STORE [[C3]](s32), [[PTR_ADD35]](p5) :: (store 4 into %stack.0 + 132, addrspace 5)
- ; CHECK: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (load 4 from %stack.0 + 132, align 256, addrspace 5)
- ; CHECK: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 from %stack.0 + 136, align 256, addrspace 5)
- ; CHECK: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 from %stack.0 + 140, align 256, addrspace 5)
- ; CHECK: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 from %stack.0 + 144, align 256, addrspace 5)
- ; CHECK: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 from %stack.0 + 148, align 256, addrspace 5)
- ; CHECK: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 4 from %stack.0 + 152, align 256, addrspace 5)
- ; CHECK: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 4 from %stack.0 + 156, align 256, addrspace 5)
- ; CHECK: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 4 from %stack.0 + 160, align 256, addrspace 5)
- ; CHECK: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 4 from %stack.0 + 164, align 256, addrspace 5)
- ; CHECK: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 4 from %stack.0 + 168, align 256, addrspace 5)
- ; CHECK: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 4 from %stack.0 + 172, align 256, addrspace 5)
- ; CHECK: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 4 from %stack.0 + 176, align 256, addrspace 5)
- ; CHECK: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 4 from %stack.0 + 180, align 256, addrspace 5)
- ; CHECK: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p5) :: (load 4 from %stack.0 + 184, align 256, addrspace 5)
- ; CHECK: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p5) :: (load 4 from %stack.0 + 188, align 256, addrspace 5)
- ; CHECK: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p5) :: (load 4 from %stack.0 + 192, align 256, addrspace 5)
- ; CHECK: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p5) :: (load 4 from %stack.0 + 196, align 256, addrspace 5)
- ; CHECK: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p5) :: (load 4 from %stack.0 + 200, align 256, addrspace 5)
- ; CHECK: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p5) :: (load 4 from %stack.0 + 204, align 256, addrspace 5)
- ; CHECK: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p5) :: (load 4 from %stack.0 + 208, align 256, addrspace 5)
- ; CHECK: [[LOAD24:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p5) :: (load 4 from %stack.0 + 212, align 256, addrspace 5)
- ; CHECK: [[LOAD25:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD23]](p5) :: (load 4 from %stack.0 + 216, align 256, addrspace 5)
- ; CHECK: [[LOAD26:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD24]](p5) :: (load 4 from %stack.0 + 220, align 256, addrspace 5)
- ; CHECK: [[LOAD27:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD25]](p5) :: (load 4 from %stack.0 + 224, align 256, addrspace 5)
- ; CHECK: [[LOAD28:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD26]](p5) :: (load 4 from %stack.0 + 228, align 256, addrspace 5)
- ; CHECK: [[LOAD29:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD27]](p5) :: (load 4 from %stack.0 + 232, align 256, addrspace 5)
- ; CHECK: [[LOAD30:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD28]](p5) :: (load 4 from %stack.0 + 236, align 256, addrspace 5)
- ; CHECK: [[LOAD31:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD29]](p5) :: (load 4 from %stack.0 + 240, align 256, addrspace 5)
- ; CHECK: [[LOAD32:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD30]](p5) :: (load 4 from %stack.0 + 244, align 256, addrspace 5)
- ; CHECK: [[LOAD33:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD31]](p5) :: (load 4 from %stack.0 + 248, align 256, addrspace 5)
- ; CHECK: [[LOAD34:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD32]](p5) :: (load 4 from %stack.0 + 252, align 256, addrspace 5)
- ; CHECK: [[LOAD35:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD33]](p5) :: (load 4 from %stack.0 + 256, align 256, addrspace 5)
- ; CHECK: [[LOAD36:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD34]](p5) :: (load 4 from %stack.0 + 260, align 256, addrspace 5)
- ; CHECK: [[COPY64:%[0-9]+]]:_(p5) = COPY [[PTR_ADD35]](p5)
- ; CHECK: [[LOAD37:%[0-9]+]]:_(s32) = G_LOAD [[COPY64]](p5) :: (load 4 from %stack.0 + 264, align 256, addrspace 5)
- ; CHECK: [[LOAD38:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD36]](p5) :: (load 4 from %stack.0 + 268, align 256, addrspace 5)
- ; CHECK: [[LOAD39:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD37]](p5) :: (load 4 from %stack.0 + 272, align 256, addrspace 5)
- ; CHECK: [[LOAD40:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD38]](p5) :: (load 4 from %stack.0 + 276, align 256, addrspace 5)
- ; CHECK: [[LOAD41:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD39]](p5) :: (load 4 from %stack.0 + 280, align 256, addrspace 5)
- ; CHECK: [[LOAD42:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD40]](p5) :: (load 4 from %stack.0 + 284, align 256, addrspace 5)
- ; CHECK: [[LOAD43:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD41]](p5) :: (load 4 from %stack.0 + 288, align 256, addrspace 5)
- ; CHECK: [[LOAD44:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD42]](p5) :: (load 4 from %stack.0 + 292, align 256, addrspace 5)
- ; CHECK: [[LOAD45:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD43]](p5) :: (load 4 from %stack.0 + 296, align 256, addrspace 5)
- ; CHECK: [[LOAD46:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD44]](p5) :: (load 4 from %stack.0 + 300, align 256, addrspace 5)
- ; CHECK: [[LOAD47:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD45]](p5) :: (load 4 from %stack.0 + 304, align 256, addrspace 5)
- ; CHECK: [[LOAD48:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD46]](p5) :: (load 4 from %stack.0 + 308, align 256, addrspace 5)
- ; CHECK: [[LOAD49:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD47]](p5) :: (load 4 from %stack.0 + 312, align 256, addrspace 5)
- ; CHECK: [[LOAD50:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD48]](p5) :: (load 4 from %stack.0 + 316, align 256, addrspace 5)
- ; CHECK: [[LOAD51:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD49]](p5) :: (load 4 from %stack.0 + 320, align 256, addrspace 5)
- ; CHECK: [[LOAD52:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD50]](p5) :: (load 4 from %stack.0 + 324, align 256, addrspace 5)
- ; CHECK: [[LOAD53:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD51]](p5) :: (load 4 from %stack.0 + 328, align 256, addrspace 5)
- ; CHECK: [[LOAD54:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD52]](p5) :: (load 4 from %stack.0 + 332, align 256, addrspace 5)
- ; CHECK: [[LOAD55:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD53]](p5) :: (load 4 from %stack.0 + 336, align 256, addrspace 5)
- ; CHECK: [[LOAD56:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD54]](p5) :: (load 4 from %stack.0 + 340, align 256, addrspace 5)
- ; CHECK: [[LOAD57:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD55]](p5) :: (load 4 from %stack.0 + 344, align 256, addrspace 5)
- ; CHECK: [[LOAD58:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD56]](p5) :: (load 4 from %stack.0 + 348, align 256, addrspace 5)
- ; CHECK: [[LOAD59:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD57]](p5) :: (load 4 from %stack.0 + 352, align 256, addrspace 5)
- ; CHECK: [[LOAD60:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD58]](p5) :: (load 4 from %stack.0 + 356, align 256, addrspace 5)
- ; CHECK: [[LOAD61:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD59]](p5) :: (load 4 from %stack.0 + 360, align 256, addrspace 5)
- ; CHECK: [[LOAD62:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD60]](p5) :: (load 4 from %stack.0 + 364, align 256, addrspace 5)
- ; CHECK: [[LOAD63:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD61]](p5) :: (load 4 from %stack.0 + 368, align 256, addrspace 5)
- ; CHECK: [[LOAD64:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD62]](p5) :: (load 4 from %stack.0 + 372, align 256, addrspace 5)
- ; CHECK: [[LOAD65:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD63]](p5) :: (load 4 from %stack.0 + 376, align 256, addrspace 5)
- ; CHECK: [[LOAD66:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD64]](p5) :: (load 4 from %stack.0 + 380, align 256, addrspace 5)
- ; CHECK: [[LOAD67:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD65]](p5) :: (load 4 from %stack.0 + 384, align 256, addrspace 5)
- ; CHECK: [[COPY65:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
- ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32)
- ; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32)
- ; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32), [[LOAD15]](s32)
- ; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD16]](s32), [[LOAD17]](s32), [[LOAD18]](s32), [[LOAD19]](s32)
- ; CHECK: [[BUILD_VECTOR4:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD20]](s32), [[LOAD21]](s32), [[LOAD22]](s32), [[LOAD23]](s32)
- ; CHECK: [[BUILD_VECTOR5:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD24]](s32), [[LOAD25]](s32), [[LOAD26]](s32), [[LOAD27]](s32)
- ; CHECK: [[BUILD_VECTOR6:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD28]](s32), [[LOAD29]](s32), [[LOAD30]](s32), [[LOAD31]](s32)
- ; CHECK: [[BUILD_VECTOR7:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD32]](s32), [[LOAD33]](s32), [[LOAD34]](s32), [[LOAD35]](s32)
- ; CHECK: [[BUILD_VECTOR8:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD36]](s32), [[LOAD37]](s32), [[LOAD38]](s32), [[LOAD39]](s32)
- ; CHECK: [[BUILD_VECTOR9:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD40]](s32), [[LOAD41]](s32), [[LOAD42]](s32), [[LOAD43]](s32)
- ; CHECK: [[BUILD_VECTOR10:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD44]](s32), [[LOAD45]](s32), [[LOAD46]](s32), [[LOAD47]](s32)
- ; CHECK: [[BUILD_VECTOR11:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD48]](s32), [[LOAD49]](s32), [[LOAD50]](s32), [[LOAD51]](s32)
- ; CHECK: [[BUILD_VECTOR12:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD52]](s32), [[LOAD53]](s32), [[LOAD54]](s32), [[LOAD55]](s32)
- ; CHECK: [[BUILD_VECTOR13:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD56]](s32), [[LOAD57]](s32), [[LOAD58]](s32), [[LOAD59]](s32)
- ; CHECK: [[BUILD_VECTOR14:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD60]](s32), [[LOAD61]](s32), [[LOAD62]](s32), [[LOAD63]](s32)
- ; CHECK: [[BUILD_VECTOR15:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD64]](s32), [[LOAD65]](s32), [[LOAD66]](s32), [[LOAD67]](s32)
- ; CHECK: G_STORE [[BUILD_VECTOR]](<4 x s32>), [[COPY65]](p1) :: (store 16, align 4, addrspace 1)
- ; CHECK: [[C67:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
- ; CHECK: [[PTR_ADD66:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C67]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR1]](<4 x s32>), [[PTR_ADD66]](p1) :: (store 16 + 16, align 4, addrspace 1)
- ; CHECK: [[C68:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
- ; CHECK: [[PTR_ADD67:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C68]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR2]](<4 x s32>), [[PTR_ADD67]](p1) :: (store 16 + 32, align 4, addrspace 1)
- ; CHECK: [[C69:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
- ; CHECK: [[PTR_ADD68:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C69]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR3]](<4 x s32>), [[PTR_ADD68]](p1) :: (store 16 + 48, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD69:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR4]](<4 x s32>), [[PTR_ADD69]](p1) :: (store 16 + 64, align 4, addrspace 1)
- ; CHECK: [[C70:%[0-9]+]]:_(s64) = G_CONSTANT i64 80
- ; CHECK: [[PTR_ADD70:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C70]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR5]](<4 x s32>), [[PTR_ADD70]](p1) :: (store 16 + 80, align 4, addrspace 1)
- ; CHECK: [[C71:%[0-9]+]]:_(s64) = G_CONSTANT i64 96
- ; CHECK: [[PTR_ADD71:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C71]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR6]](<4 x s32>), [[PTR_ADD71]](p1) :: (store 16 + 96, align 4, addrspace 1)
- ; CHECK: [[C72:%[0-9]+]]:_(s64) = G_CONSTANT i64 112
- ; CHECK: [[PTR_ADD72:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C72]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR7]](<4 x s32>), [[PTR_ADD72]](p1) :: (store 16 + 112, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD73:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C1]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR8]](<4 x s32>), [[PTR_ADD73]](p1) :: (store 16 + 128, align 4, addrspace 1)
- ; CHECK: [[C73:%[0-9]+]]:_(s64) = G_CONSTANT i64 144
- ; CHECK: [[PTR_ADD74:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C73]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR9]](<4 x s32>), [[PTR_ADD74]](p1) :: (store 16 + 144, align 4, addrspace 1)
- ; CHECK: [[C74:%[0-9]+]]:_(s64) = G_CONSTANT i64 160
- ; CHECK: [[PTR_ADD75:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C74]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR10]](<4 x s32>), [[PTR_ADD75]](p1) :: (store 16 + 160, align 4, addrspace 1)
- ; CHECK: [[C75:%[0-9]+]]:_(s64) = G_CONSTANT i64 176
- ; CHECK: [[PTR_ADD76:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C75]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR11]](<4 x s32>), [[PTR_ADD76]](p1) :: (store 16 + 176, align 4, addrspace 1)
- ; CHECK: [[PTR_ADD77:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C2]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR12]](<4 x s32>), [[PTR_ADD77]](p1) :: (store 16 + 192, align 4, addrspace 1)
- ; CHECK: [[C76:%[0-9]+]]:_(s64) = G_CONSTANT i64 208
- ; CHECK: [[PTR_ADD78:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C76]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR13]](<4 x s32>), [[PTR_ADD78]](p1) :: (store 16 + 208, align 4, addrspace 1)
- ; CHECK: [[C77:%[0-9]+]]:_(s64) = G_CONSTANT i64 224
- ; CHECK: [[PTR_ADD79:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C77]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR14]](<4 x s32>), [[PTR_ADD79]](p1) :: (store 16 + 224, align 4, addrspace 1)
- ; CHECK: [[C78:%[0-9]+]]:_(s64) = G_CONSTANT i64 240
- ; CHECK: [[PTR_ADD80:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY65]], [[C78]](s64)
- ; CHECK: G_STORE [[BUILD_VECTOR15]](<4 x s32>), [[PTR_ADD80]](p1) :: (store 16 + 240, align 4, addrspace 1)
+ ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<32 x s32>) = G_CONCAT_VECTORS [[LOAD2]](<16 x s32>), [[LOAD3]](<16 x s32>)
+ ; CHECK: [[INSERT:%[0-9]+]]:_(<32 x s32>) = G_INSERT [[CONCAT_VECTORS]], [[C3]](s32), 32
+ ; CHECK: [[COPY1:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
+ ; CHECK: [[UV:%[0-9]+]]:_(<4 x s32>), [[UV1:%[0-9]+]]:_(<4 x s32>), [[UV2:%[0-9]+]]:_(<4 x s32>), [[UV3:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>)
+ ; CHECK: [[UV4:%[0-9]+]]:_(<4 x s32>), [[UV5:%[0-9]+]]:_(<4 x s32>), [[UV6:%[0-9]+]]:_(<4 x s32>), [[UV7:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[LOAD1]](<16 x s32>)
+ ; CHECK: [[UV8:%[0-9]+]]:_(<4 x s32>), [[UV9:%[0-9]+]]:_(<4 x s32>), [[UV10:%[0-9]+]]:_(<4 x s32>), [[UV11:%[0-9]+]]:_(<4 x s32>), [[UV12:%[0-9]+]]:_(<4 x s32>), [[UV13:%[0-9]+]]:_(<4 x s32>), [[UV14:%[0-9]+]]:_(<4 x s32>), [[UV15:%[0-9]+]]:_(<4 x s32>) = G_UNMERGE_VALUES [[INSERT]](<32 x s32>)
+ ; CHECK: G_STORE [[UV]](<4 x s32>), [[COPY1]](p1) :: (store 16, align 4, addrspace 1)
+ ; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
+ ; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C4]](s64)
+ ; CHECK: G_STORE [[UV1]](<4 x s32>), [[PTR_ADD3]](p1) :: (store 16 + 16, align 4, addrspace 1)
+ ; CHECK: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; CHECK: [[PTR_ADD4:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C5]](s64)
+ ; CHECK: G_STORE [[UV2]](<4 x s32>), [[PTR_ADD4]](p1) :: (store 16 + 32, align 4, addrspace 1)
+ ; CHECK: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
+ ; CHECK: [[PTR_ADD5:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C6]](s64)
+ ; CHECK: G_STORE [[UV3]](<4 x s32>), [[PTR_ADD5]](p1) :: (store 16 + 48, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD6:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C]](s64)
+ ; CHECK: G_STORE [[UV4]](<4 x s32>), [[PTR_ADD6]](p1) :: (store 16 + 64, align 4, addrspace 1)
+ ; CHECK: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 80
+ ; CHECK: [[PTR_ADD7:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C7]](s64)
+ ; CHECK: G_STORE [[UV5]](<4 x s32>), [[PTR_ADD7]](p1) :: (store 16 + 80, align 4, addrspace 1)
+ ; CHECK: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 96
+ ; CHECK: [[PTR_ADD8:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C8]](s64)
+ ; CHECK: G_STORE [[UV6]](<4 x s32>), [[PTR_ADD8]](p1) :: (store 16 + 96, align 4, addrspace 1)
+ ; CHECK: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 112
+ ; CHECK: [[PTR_ADD9:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C9]](s64)
+ ; CHECK: G_STORE [[UV7]](<4 x s32>), [[PTR_ADD9]](p1) :: (store 16 + 112, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD10:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C1]](s64)
+ ; CHECK: G_STORE [[UV8]](<4 x s32>), [[PTR_ADD10]](p1) :: (store 16 + 128, align 4, addrspace 1)
+ ; CHECK: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 144
+ ; CHECK: [[PTR_ADD11:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C10]](s64)
+ ; CHECK: G_STORE [[UV9]](<4 x s32>), [[PTR_ADD11]](p1) :: (store 16 + 144, align 4, addrspace 1)
+ ; CHECK: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 160
+ ; CHECK: [[PTR_ADD12:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C11]](s64)
+ ; CHECK: G_STORE [[UV10]](<4 x s32>), [[PTR_ADD12]](p1) :: (store 16 + 160, align 4, addrspace 1)
+ ; CHECK: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 176
+ ; CHECK: [[PTR_ADD13:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C12]](s64)
+ ; CHECK: G_STORE [[UV11]](<4 x s32>), [[PTR_ADD13]](p1) :: (store 16 + 176, align 4, addrspace 1)
+ ; CHECK: [[PTR_ADD14:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C2]](s64)
+ ; CHECK: G_STORE [[UV12]](<4 x s32>), [[PTR_ADD14]](p1) :: (store 16 + 192, align 4, addrspace 1)
+ ; CHECK: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 208
+ ; CHECK: [[PTR_ADD15:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C13]](s64)
+ ; CHECK: G_STORE [[UV13]](<4 x s32>), [[PTR_ADD15]](p1) :: (store 16 + 208, align 4, addrspace 1)
+ ; CHECK: [[C14:%[0-9]+]]:_(s64) = G_CONSTANT i64 224
+ ; CHECK: [[PTR_ADD16:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C14]](s64)
+ ; CHECK: G_STORE [[UV14]](<4 x s32>), [[PTR_ADD16]](p1) :: (store 16 + 224, align 4, addrspace 1)
+ ; CHECK: [[C15:%[0-9]+]]:_(s64) = G_CONSTANT i64 240
+ ; CHECK: [[PTR_ADD17:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY1]], [[C15]](s64)
+ ; CHECK: G_STORE [[UV15]](<4 x s32>), [[PTR_ADD17]](p1) :: (store 16 + 240, align 4, addrspace 1)
%0:_(p1) = COPY $sgpr0_sgpr1
%1:_(s32) = G_CONSTANT i32 33
%2:_(<64 x s32>) = G_LOAD %0 :: (load 256, align 4, addrspace 4)
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
index 3a9fb59cae6f..bd54b6d7e359 100644
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
@@ -3051,4 +3051,85 @@ TEST_F(AArch64GISelMITest, MoreElementsFreeze) {
EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
}
+// Test fewer elements of G_INSERT_VECTOR_ELEMENT
+TEST_F(AArch64GISelMITest, FewerElementsInsertVectorElt) {
+ setUp();
+ if (!TM)
+ return;
+
+ DefineLegalizerInfo(A, {});
+
+ LLT P0{LLT::pointer(0, 64)};
+ LLT S64{LLT::scalar(64)};
+ LLT S16{LLT::scalar(16)};
+ LLT V2S16{LLT::vector(2, 16)};
+ LLT V3S16{LLT::vector(3, 16)};
+ LLT V8S16{LLT::vector(8, 16)};
+
+ auto Ptr0 = B.buildIntToPtr(P0, Copies[0]);
+ auto VectorV8 = B.buildLoad(V8S16, Ptr0, MachinePointerInfo(), Align(8));
+ auto Value = B.buildTrunc(S16, Copies[1]);
+
+ auto Seven = B.buildConstant(S64, 7);
+ auto InsertV8Constant7_0 =
+ B.buildInsertVectorElement(V8S16, VectorV8, Value, Seven);
+ auto InsertV8Constant7_1 =
+ B.buildInsertVectorElement(V8S16, VectorV8, Value, Seven);
+
+ B.buildStore(InsertV8Constant7_0, Ptr0, MachinePointerInfo(), Align(8),
+ MachineMemOperand::MOVolatile);
+ B.buildStore(InsertV8Constant7_1, Ptr0, MachinePointerInfo(), Align(8),
+ MachineMemOperand::MOVolatile);
+
+ AInfo Info(MF->getSubtarget());
+ DummyGISelObserver Observer;
+ LegalizerHelper Helper(*MF, Info, Observer, B);
+
+ // Perform Legalization
+ B.setInsertPt(*EntryMBB, InsertV8Constant7_0->getIterator());
+
+ // This should index the high element of the 4th piece of an unmerge.
+ EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
+ Helper.fewerElementsVector(*InsertV8Constant7_0, 0, V2S16));
+
+ // This case requires extracting an intermediate vector type into the target
+ // v4s16.
+ B.setInsertPt(*EntryMBB, InsertV8Constant7_1->getIterator());
+ EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
+ Helper.fewerElementsVector(*InsertV8Constant7_1, 0, V3S16));
+
+ const auto *CheckStr = R"(
+ CHECK: [[COPY0:%[0-9]+]]:_(s64) = COPY
+ CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY
+ CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY
+ CHECK: [[PTR0:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY0]]
+ CHECK: [[VEC8:%[0-9]+]]:_(<8 x s16>) = G_LOAD [[PTR0]]:_(p0) :: (load 16, align 8)
+ CHECK: [[INSERT_VAL:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]]
+
+
+ CHECK: [[UNMERGE0:%[0-9]+]]:_(<2 x s16>), [[UNMERGE1:%[0-9]+]]:_(<2 x s16>), [[UNMERGE2:%[0-9]+]]:_(<2 x s16>), [[UNMERGE3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[VEC8]]
+ CHECK: [[ONE:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ CHECK: [[SUB_INSERT_7:%[0-9]+]]:_(<2 x s16>) = G_INSERT_VECTOR_ELT [[UNMERGE3]]:_, [[INSERT_VAL]]:_(s16), [[ONE]]
+ CHECK: [[INSERT_V8_7_0:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[UNMERGE0]]:_(<2 x s16>), [[UNMERGE1]]:_(<2 x s16>), [[UNMERGE2]]:_(<2 x s16>), [[SUB_INSERT_7]]:_(<2 x s16>)
+
+
+ CHECK: [[UNMERGE1_0:%[0-9]+]]:_(s16), [[UNMERGE1_1:%[0-9]+]]:_(s16), [[UNMERGE1_2:%[0-9]+]]:_(s16), [[UNMERGE1_3:%[0-9]+]]:_(s16), [[UNMERGE1_4:%[0-9]+]]:_(s16), [[UNMERGE1_5:%[0-9]+]]:_(s16), [[UNMERGE1_6:%[0-9]+]]:_(s16), [[UNMERGE1_7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[VEC8]]:_(<8 x s16>)
+ CHECK: [[IMPDEF_S16:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF
+ CHECK: [[BUILD0:%[0-9]+]]:_(<3 x s16>) = G_BUILD_VECTOR [[UNMERGE1_0]]:_(s16), [[UNMERGE1_1]]:_(s16), [[UNMERGE1_2]]:_(s16)
+ CHECK: [[BUILD1:%[0-9]+]]:_(<3 x s16>) = G_BUILD_VECTOR [[UNMERGE1_3]]:_(s16), [[UNMERGE1_4]]:_(s16), [[UNMERGE1_5]]:_(s16)
+ CHECK: [[BUILD2:%[0-9]+]]:_(<3 x s16>) = G_BUILD_VECTOR [[UNMERGE1_6]]:_(s16), [[UNMERGE1_7]]:_(s16), [[IMPDEF_S16]]:_(s16)
+ CHECK: [[IMPDEF_V3S16:%[0-9]+]]:_(<3 x s16>) = G_IMPLICIT_DEF
+ CHECK: [[ONE_1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ CHECK: [[SUB_INSERT_7_V3S16:%[0-9]+]]:_(<3 x s16>) = G_INSERT_VECTOR_ELT [[BUILD2]]:_, [[INSERT_VAL]]:_(s16), [[ONE_1]]
+ CHECK: [[WIDE_CONCAT:%[0-9]+]]:_(<24 x s16>) = G_CONCAT_VECTORS [[BUILD0]]:_(<3 x s16>), [[BUILD1]]:_(<3 x s16>), [[SUB_INSERT_7_V3S16]]:_(<3 x s16>), [[IMPDEF_V3S16]]:_(<3 x s16>), [[IMPDEF_V3S16]]:_(<3 x s16>), [[IMPDEF_V3S16]]:_(<3 x s16>), [[IMPDEF_V3S16]]:_(<3 x s16>), [[IMPDEF_V3S16]]:_(<3 x s16>)
+ CHECK: [[INSERT_V8_7_1:%[0-9]+]]:_(<8 x s16>) = G_EXTRACT [[WIDE_CONCAT]]:_(<24 x s16>), 0
+
+ CHECK: G_STORE [[INSERT_V8_7_0]]
+ CHECK: G_STORE [[INSERT_V8_7_1]]
+ )";
+
+ // Check
+ EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
+}
+
} // namespace
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