[llvm] 9b32ef9 - [Test][NFC] Add a new test to verify if scheduler can cluster two ld/st

[QingShan Zhang via llvm-commits]

Author: QingShan Zhang
Date: 2020-08-18T09:42:15Z
New Revision: 9b32ef9413be2f18ad98f24454854b438b5d9214

URL: https://github.com/llvm/llvm-project/commit/9b32ef9413be2f18ad98f24454854b438b5d9214
DIFF: https://github.com/llvm/llvm-project/commit/9b32ef9413be2f18ad98f24454854b438b5d9214.diff

LOG: [Test][NFC] Add a new test to verify if scheduler can cluster two ld/st
even with different preds

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll b/llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll
index e821e8504d96..b0ed3d0490cc 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll
@@ -213,3 +213,28 @@ entry:
   store i32 %add, i32* %arrayidx1, align 4
   ret void
 }
+
+; FIXME - The SU(4) and SU(7) can be clustered even with
+; 
diff erent preds
+; CHECK: ********** MI Scheduling **********
+; CHECK-LABEL: cluster_with_
diff erent_preds:%bb.0
+; CHECK-NOT:Cluster ld/st SU(4) - SU(7)
+; CHECK:SU(3):   STRWui %2:gpr32, %0:gpr64common, 0 ::
+; CHECK:SU(4):   %3:gpr32 = LDRWui %1:gpr64common, 0 ::
+; CHECK:Predecessors:
+; CHECK: SU(3): Ord  Latency=1 Memory
+; CHECK:SU(6):   STRBBui %4:gpr32, %1:gpr64common, 4 ::
+; CHECK:SU(7):   %5:gpr32 = LDRWui %1:gpr64common, 1 ::
+; CHECK:Predecessors:
+; CHECK:SU(6): Ord  Latency=1 Memory
+define i32 @cluster_with_
diff erent_preds(i32* %p, i32* %q) {
+entry:
+  store i32 3, i32* %p, align 4
+  %0 = load i32, i32* %q, align 4
+  %add.ptr = getelementptr inbounds i32, i32* %q, i64 1
+  %1 = bitcast i32* %add.ptr to i8*
+  store i8 5, i8* %1, align 1
+  %2 = load i32, i32* %add.ptr, align 4
+  %add = add nsw i32 %2, %0
+  ret i32 %add
+}