[PATCH] D84549: [XCOFF][AIX] Support relocation generation for large code model

[Digger via Phabricator via llvm-commits]

DiggerLin added inline comments.


================
Comment at: llvm/lib/MC/XCOFFObjectWriter.cpp:434
     // The FixedValue should be the TC entry offset from TOC-base.
     FixedValue = SectionMap[SymASec]->Address - TOCCsects.front().Address;
 
----------------
jasonliu wrote:
> DiggerLin wrote:
> > I am not sure whether I understand is correct or not ?
> > FixedValue of intructions
> > addis 3, L..C0 at u(2) . FixedValue should get the high 16bits of SectionMap[SymASec]->Address - TOCCsects.front().Address;
> > 
> > lwz 3, L..C0 at l(3) FixedValue should get the low 16bits of SectionMap[SymASec]->Address - TOCCsects.front().Address;
> > 
> > if I understand correct , the code need to change.
> > 
> > 
> > 
> Could you give an example that would generated non-0 FixedValue in TOCU position?
> The example (the test case I have below) I tried before, TOCU position always have 0 as its FixedValue with system assembler generated object.
  ```1ae98: 3c 62 00 01                   addis 3, 2, 1
                        0001ae9a:  R_TOCU       (idx: 36364) a10995[TE]
   1ae9c: 80 63 8d f8                   lwz 3, -29192(3)
                        0001ae9e:  R_TOCL       (idx: 36364) a10995[TE]
   1aea0: 90 83 00 00                   stw 4, 0(3)
   1aea4: 3c 62 00 01                   addis 3, 2, 1
                        0001aea6:  R_TOCU       (idx: 36366) a10996[TE]
   1aea8: 80 63 8d fc                   lwz 3, -29188(3)
                        0001aeaa:  R_TOCL       (idx: 36366) a10996[TE]
   1aeac: 90 83 00 00                   stw 4, 0(3)
   1aeb0: 3c 62 00 01                   addis 3, 2, 1
```


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  https://reviews.llvm.org/D84549/new/

https://reviews.llvm.org/D84549