[llvm] 43a38dc - [AMDGPU] Fix MAI ld/st hazard handling

Stanislav Mekhanoshin via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 14 17:07:50 PDT 2020


Author: Stanislav Mekhanoshin
Date: 2020-08-14T17:07:37-07:00
New Revision: 43a38dc25173d5139a7f14b06f3ee7b59325c96c

URL: https://github.com/llvm/llvm-project/commit/43a38dc25173d5139a7f14b06f3ee7b59325c96c
DIFF: https://github.com/llvm/llvm-project/commit/43a38dc25173d5139a7f14b06f3ee7b59325c96c.diff

LOG: [AMDGPU] Fix MAI ld/st hazard handling

It did not process hazard for ds_permute because it does not
load or store even though it is DS.

Differential Revision: https://reviews.llvm.org/D86003

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    llvm/test/CodeGen/AMDGPU/mai-hazards.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
index 30a563fdc1df..d897127812b9 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -185,7 +185,9 @@ GCNHazardRecognizer::getHazardType(SUnit *SU, int Stalls) {
   if (SIInstrInfo::isMAI(*MI) && checkMAIHazards(MI) > 0)
     return NoopHazard;
 
-  if (MI->mayLoadOrStore() && checkMAILdStHazards(MI) > 0)
+  if ((SIInstrInfo::isVMEM(*MI) ||
+       SIInstrInfo::isFLAT(*MI) ||
+       SIInstrInfo::isDS(*MI)) && checkMAILdStHazards(MI) > 0)
     return NoopHazard;
 
   if (MI->isInlineAsm() && checkInlineAsmHazards(MI) > 0)
@@ -288,7 +290,9 @@ unsigned GCNHazardRecognizer::PreEmitNoopsCommon(MachineInstr *MI) {
   if (SIInstrInfo::isMAI(*MI))
     return std::max(WaitStates, checkMAIHazards(MI));
 
-  if (MI->mayLoadOrStore())
+  if (SIInstrInfo::isVMEM(*MI) ||
+      SIInstrInfo::isFLAT(*MI) ||
+      SIInstrInfo::isDS(*MI))
     return std::max(WaitStates, checkMAILdStHazards(MI));
 
   return WaitStates;

diff  --git a/llvm/test/CodeGen/AMDGPU/mai-hazards.mir b/llvm/test/CodeGen/AMDGPU/mai-hazards.mir
index 59ce256dc012..ca4ae3268b17 100644
--- a/llvm/test/CodeGen/AMDGPU/mai-hazards.mir
+++ b/llvm/test/CodeGen/AMDGPU/mai-hazards.mir
@@ -401,6 +401,45 @@ body:             |
 ...
 ---
 
+# GCN-LABEL: name: accvgpr_read_write_vgpr_ds_permute
+# GCN:      V_ACCVGPR_READ_B32
+# GCN-NEXT: S_NOP 0
+# GCN-NEXT: S_NOP 0
+# GCN-NEXT: DS_PERMUTE_B32
+name:            accvgpr_read_write_vgpr_ds_permute
+body:             |
+  bb.0:
+    $vgpr0 = V_ACCVGPR_READ_B32 killed $agpr0, implicit $exec
+    $vgpr1 = DS_PERMUTE_B32 $vgpr0, $vgpr1, 0, implicit $exec
+...
+---
+
+# GCN-LABEL: name: accvgpr_read_write_vgpr_flat_load
+# GCN:      V_ACCVGPR_READ_B32
+# GCN-NEXT: S_NOP 0
+# GCN-NEXT: S_NOP 0
+# GCN-NEXT: FLAT_LOAD_DWORD
+name:            accvgpr_read_write_vgpr_flat_load
+body:             |
+  bb.0:
+    $vgpr0 = V_ACCVGPR_READ_B32 killed $agpr0, implicit $exec
+    $vgpr4 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
+...
+---
+
+# GCN-LABEL: name: accvgpr_read_write_vgpr_buffer_store
+# GCN:      V_ACCVGPR_READ_B32
+# GCN-NEXT: S_NOP 0
+# GCN-NEXT: S_NOP 0
+# GCN-NEXT: BUFFER_STORE_DWORD_OFFSET
+name:            accvgpr_read_write_vgpr_buffer_store
+body:             |
+  bb.0:
+    $vgpr0 = V_ACCVGPR_READ_B32 killed $agpr0, implicit $exec
+    BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, 0, 0, implicit $exec
+...
+---
+
 # GCN-LABEL: name: accvgpr_read_write_vgpr_store
 # GCN:      V_ACCVGPR_READ_B32
 # GCN-NEXT: S_NOP 0


        


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