[PATCH] D85941: AMDGPU: Correct definitions for global saddr instructions

[Matt Arsenault via Phabricator via llvm-commits]

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The VGPR component is a 32-bit offset, not 64-bits.

      

I'm not sure what the correct syntax is for this. This maintains the
vaddr position and leaves saddr in the end "off" position. This is
particularly terrible for stores, since the operand order is now <vgpr
offset>, <data>, <sgpr base>, splitting the pointer operands. I
suppose this is a logical consequence from the mistake of not putting
the data operand first. I'm not sure what sp3 does.


https://reviews.llvm.org/D85941

Files:
  llvm/lib/Target/AMDGPU/FLATInstructions.td
  llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
  llvm/test/MC/AMDGPU/flat-global.s
  llvm/test/MC/AMDGPU/gfx1030_new.s

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