[PATCH] D76445: [WIP][RISCV][GlobalISel] Select ALU GPR instructions

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 11 12:36:39 PDT 2020


arsenm added a comment.

Missing copy tests for all permutations of virtual and physical registers



================
Comment at: llvm/lib/Target/RISCV/RISCVInstructionSelector.cpp:114-115
+
+  if (Register::isPhysicalRegister(DstReg))
+    return true;
+
----------------
This can't early return, it still needs to constrain a virtual source


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