[PATCH] D84403: [AMDGPU] Use ds_read/write_b96/b128 when possible for SDag

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:7954
+    // Use ds_read_b128 or ds_read_b96 when possible.
+    if (Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS &&
+        MemVT.getStoreSize() <= (Subtarget->useDS128() ? 16 : 12) &&
----------------
I don't want to spread generation checks anywhere outside of AMDGPUSubtarget, so this should check some other feature or helper inside the subtarget


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:8432
+    // Use ds_write_b128 or ds_write_b96 when possible.
+    if (Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS &&
+        VT.getStoreSize() <= (Subtarget->useDS128() ? 16 : 12) &&
----------------
Ditto


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:8435
+        allowsMisalignedMemoryAccessesImpl(VT.getSizeInBits(), AS,
+                                           Align(Store->getAlignment()))) {
+      return SDValue();
----------------
I assume there's a Store->getAlign() to avoid the Align construction?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D84403/new/

https://reviews.llvm.org/D84403