[PATCH] D85499: [X86] Canonicalize andnp for bitmask arithmetic

[Keno Fischer via Phabricator via llvm-commits]

loladiro created this revision.
loladiro added reviewers: craig.topper, RKSimon, spatel.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
loladiro requested review of this revision.

We have a DAG combine that tries to fold (vselect cond, 0000..., X) -> (andnp cond, x).
However, it does so by attempting to create an i64 vector with the number
of elements obtained by truncating division by 64 from the bitwidth. This is
bad for mask vectors like v8i1, since that division is just zero. Besides,
we don't want i64 vectors anyway. The easy change is just to avoid changing
the VT, but this is slightly problematic because the canonical pattern for
`kandn` is `(and (vnot a) b)` rather than `(x86andnp a b)`, so this fails
to select. Rather than playing games here with having the mask vectors
use a different canonical representation, the bulk of this commit switches
the canonical ISD representation for `kandn` to `(x86andnp a b)` such
that all vector types may be handled equally here. To avoid regressing
other tests, we need to extend a few other folds to handle `x86andnp` in
addition to plain `and`. However, that should be generally a good
improvement, since x86andnp is already canonical for non-i1 vectors
prior to this commit, and said folds were just missing.

When all is said and done, fixes the issue reported in
https://github.com/JuliaLang/julia/issues/36955.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D85499

Files:
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86InstrAVX512.td
  llvm/test/CodeGen/X86/avx512-select.ll
  llvm/test/CodeGen/X86/combine-bitselect.ll
  llvm/test/CodeGen/X86/ssub_sat_vec.ll
  llvm/test/CodeGen/X86/usub_sat_vec.ll
  llvm/test/CodeGen/X86/vec_ssubo.ll
  llvm/test/CodeGen/X86/vec_usubo.ll

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