[PATCH] D85418: [VE] Optimize trunc related instructions

[Kazushi Marukawa via Phabricator via llvm-commits]

kaz7 created this revision.
kaz7 added reviewers: simoll, k-ishizaka.
kaz7 added projects: LLVM, VE.
Herald added subscribers: llvm-commits, jfb, hiraditya.
kaz7 requested review of this revision.

Change to not generate truncate instructions if all use of a truncate
operation don't care about higher bits.  For example, an i32 add
instruction doesn't care about higher 32 bits in 64 bit registers.
Updates regression tests also.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D85418

Files:
  llvm/lib/Target/VE/VEISelLowering.cpp
  llvm/lib/Target/VE/VEISelLowering.h
  llvm/test/CodeGen/VE/addition.ll
  llvm/test/CodeGen/VE/bitcast.ll
  llvm/test/CodeGen/VE/branch1.ll
  llvm/test/CodeGen/VE/bswap.ll
  llvm/test/CodeGen/VE/cast.ll
  llvm/test/CodeGen/VE/div.ll
  llvm/test/CodeGen/VE/int_to_fp.ll
  llvm/test/CodeGen/VE/left_shift.ll
  llvm/test/CodeGen/VE/max.ll
  llvm/test/CodeGen/VE/min.ll
  llvm/test/CodeGen/VE/multiply.ll
  llvm/test/CodeGen/VE/rem.ll
  llvm/test/CodeGen/VE/right_shift.ll
  llvm/test/CodeGen/VE/rotl.ll
  llvm/test/CodeGen/VE/rotr.ll
  llvm/test/CodeGen/VE/select.ll
  llvm/test/CodeGen/VE/selectccf32c.ll
  llvm/test/CodeGen/VE/selectccf64c.ll
  llvm/test/CodeGen/VE/selectcci32.ll
  llvm/test/CodeGen/VE/selectcci32c.ll
  llvm/test/CodeGen/VE/selectcci32i.ll
  llvm/test/CodeGen/VE/selectcci64c.ll
  llvm/test/CodeGen/VE/setcci32.ll
  llvm/test/CodeGen/VE/setcci32i.ll
  llvm/test/CodeGen/VE/subtraction.ll

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