[PATCH] D85415: [Sparc] Don't use SunStyleELFSectionSwitchSyntax

[Rainer Orth via Phabricator via llvm-commits]

ro created this revision.
ro added reviewers: venkatra, efriedma, jyknight.
Herald added subscribers: dexonsmith, jrtc27, fedor.sergeev, hiraditya.
Herald added a project: LLVM.
ro requested review of this revision.

As discussed in D85414 <https://reviews.llvm.org/D85414>, two tests currently `FAIL` on Sparc since that backend currently
uses the Sun assembler syntax for the `.section` directive, controlled by `SunStyleELFSectionSwitchSyntax`.

Instead of adapting the affected tests, this patch changes that default.  The internal assembler still accepts both forms as input, only the output syntax is affected.

Current support for the Sun syntax is cursory at best: the built-in assembler cannot even assemble some of the directives emitted by GCC, and the set supported by the Solaris assembler is even larger: SPARC Assembly Language Reference Manual, 3.4 Pseudo-Op Attributes <https://docs.oracle.com/cd/E37838_01/html/E61063/gmabi.html#scrolltoc>.

A few Sparc test cases need to be adjusted. At the same time, the patch fixes the failures from D85414 <https://reviews.llvm.org/D85414>.

Tested on `sparcv9-sun-solaris2.11`.

I believe this patch needs wider testing first, though: I have a hard time getting decent test results for a 2-stage build on Solaris/SPARC.  I'm currently trying a `sparc64-unknown-linux-gnu` build to see if things fare better there.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D85415

Files:
  llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
  llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
  llvm/test/CodeGen/SPARC/constructor.ll
  llvm/test/MC/Sparc/sparc-pic.s
  llvm/test/MC/Sparc/sparc-tls-relocations.s


Index: llvm/test/MC/Sparc/sparc-tls-relocations.s
===================================================================
--- llvm/test/MC/Sparc/sparc-tls-relocations.s
+++ llvm/test/MC/Sparc/sparc-tls-relocations.s
@@ -150,7 +150,7 @@
         call __tls_get_addr, %tgd_call(Extern)
 
         .type  Local, at object
-        .section      .tbss,#alloc,#write,#tls
+        .section      .tbss,"awT"
 Local:
         .word  0
         .size  Local, 4
Index: llvm/test/MC/Sparc/sparc-pic.s
===================================================================
--- llvm/test/MC/Sparc/sparc-pic.s
+++ llvm/test/MC/Sparc/sparc-pic.s
@@ -74,7 +74,7 @@
         .cfi_endproc
 
         .type   AGlobalVar, at object      ! @AGlobalVar
-        .section        .bss,#alloc,#write
+        .section        .bss,"aw"
         .globl  AGlobalVar
         .align  8
 AGlobalVar:
Index: llvm/test/CodeGen/SPARC/constructor.ll
===================================================================
--- llvm/test/CodeGen/SPARC/constructor.ll
+++ llvm/test/CodeGen/SPARC/constructor.ll
@@ -14,16 +14,16 @@
   ret void
 }
 
-; CTOR:    .section  .ctors.65520,#alloc,#write
+; CTOR:    .section  .ctors.65520,"aGw"
 ; CTOR-NEXT: .p2align      2
 ; CTOR-NEXT: .word  g
-; CTOR-NEXT: .section      .ctors,#alloc,#write
+; CTOR-NEXT: .section      .ctors,"aw"
 ; CTOR-NEXT: .p2align      2
 ; CTOR-NEXT: .word  f
 
-; INIT-ARRAY:    .section  .init_array.15,#alloc,#write
+; INIT-ARRAY:    .section  .init_array.15,"aGw"
 ; INIT-ARRAY-NEXT: .p2align  2
 ; INIT-ARRAY-NEXT: .word g
-; INIT-ARRAY-NEXT: .section  .init_array,#alloc,#write
+; INIT-ARRAY-NEXT: .section  .init_array,"aw"
 ; INIT-ARRAY-NEXT: .p2align  2
 ; INIT-ARRAY-NEXT: .word f
Index: llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
===================================================================
--- llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
+++ llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
@@ -2,8 +2,8 @@
 ; PR 1557
 
 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
-module asm "\09.section\09\22.ctors\22,#alloc,#write"
-module asm "\09.section\09\22.dtors\22,#alloc,#write"
+module asm "\09.section\09.ctors,\22aw\22"
+module asm "\09.section\09.dtors,\22aw\22"
 
 define void @frame_dummy() nounwind {
 entry:
Index: llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
===================================================================
--- llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
+++ llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
@@ -40,7 +40,6 @@
 
   ExceptionsType = ExceptionHandling::DwarfCFI;
 
-  SunStyleELFSectionSwitchSyntax = true;
   UsesELFSectionDirectiveForBSS = true;
 }
 


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