[PATCH] D85234: [AMDGPU] Scavenge a temp register for AGPR spill in fast RA

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 4 12:37:17 PDT 2020


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:1361
+      MachineRegisterInfo &MRI = MF->getRegInfo();
+      Tmp = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
+    }
----------------
I think this should be dealt with in eliminateFrameIndex rather than trying to speculatively add the def here


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85234/new/

https://reviews.llvm.org/D85234



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