[PATCH] D85233: [GlobalISel] Implement bit-test switch table optimization

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 4 13:00:39 PDT 2020


aemerson added inline comments.


================
Comment at: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp:738
+  bool UsePtrType = false;
+  if (!TLI.isTypeLegal(SwitchVT)) {
+    UsePtrType = true;
----------------
arsenm wrote:
> Why depend on "legal" types? The concept should mostly be going away
This was from SelectionDAG, I think for performance reasons. I'll remove it.


================
Comment at: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp:770
+                                  RangeSub, RangeCst);
+    MIB.buildBrCond(RangeCmp.getReg(0), *B.Default);
+  }
----------------
arsenm wrote:
> Don't need getReg
Actually I do for buildBrCond() since that is still expecting a Register. I'll change that though.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85233/new/

https://reviews.llvm.org/D85233



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