[PATCH] D85101: [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported

[Ties Stuij via Phabricator via llvm-commits]

stuij added a comment.

In D85101#2190026 <https://reviews.llvm.org/D85101#2190026>, @dmgreen wrote:

> Quick question - what is the expected behaviour? Do we just never expect to see an bf16 add, and if we do it's a fatal error? Or is some form of automatic promotion expected to happen?

Yes, I don't think we should see explicit bfloat adds. It's a storage type, and addition might not be what the user intended. So we should error.



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1045
+    setOperationAction(ISD::SREM, VT, Expand);
+    setOperationAction(ISD::FREM, VT, Expand);
+  }
----------------
dnsampaio wrote:
> dmgreen wrote:
> > Why not leave these as expand?
> And they are integers as well, no? Perhaps the correct tests we want here is `!VT.isFloatingPoint()` or alike?
As I understand, as bfloat is a storage type, it should be converted explicitly to a different type if you want to do arithmetic operations. It makes sense to me to explicitly not allow this.


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