[llvm] 4fdc4d8 - [NFC] [MIR] Document the reg state flags

[Djordje Todorovic via llvm-commits]

Author: Djordje Todorovic
Date: 2020-08-03T09:03:24+02:00
New Revision: 4fdc4d892b988bb9f2e06c3440971d28d6361722

URL: https://github.com/llvm/llvm-project/commit/4fdc4d892b988bb9f2e06c3440971d28d6361722
DIFF: https://github.com/llvm/llvm-project/commit/4fdc4d892b988bb9f2e06c3440971d28d6361722.diff

LOG: [NFC] [MIR] Document the reg state flags

This patch adds documentation for the RegState enumeration.

Differential Revision: https://reviews.llvm.org/D84634

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/MachineInstrBuilder.h

Removed: 
    


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diff  --git a/llvm/include/llvm/CodeGen/MachineInstrBuilder.h b/llvm/include/llvm/CodeGen/MachineInstrBuilder.h
index cabb9f1c97c9..b31e9cdb0e90 100644
--- a/llvm/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/llvm/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -40,20 +40,30 @@ class MDNode;
 
 namespace RegState {
 
-  enum {
-    Define         = 0x2,
-    Implicit       = 0x4,
-    Kill           = 0x8,
-    Dead           = 0x10,
-    Undef          = 0x20,
-    EarlyClobber   = 0x40,
-    Debug          = 0x80,
-    InternalRead   = 0x100,
-    Renamable      = 0x200,
-    DefineNoRead   = Define | Undef,
-    ImplicitDefine = Implicit | Define,
-    ImplicitKill   = Implicit | Kill
-  };
+enum {
+  /// Register definition.
+  Define = 0x2,
+  /// Not emitted register (e.g. carry, or temporary result).
+  Implicit = 0x4,
+  /// The last use of a register.
+  Kill = 0x8,
+  /// Unused definition.
+  Dead = 0x10,
+  /// Value of the register doesn't matter.
+  Undef = 0x20,
+  /// Register definition happens before uses.
+  EarlyClobber = 0x40,
+  /// Register 'use' is for debugging purpose.
+  Debug = 0x80,
+  /// Register reads a value that is defined inside the same instruction or
+  /// bundle.
+  InternalRead = 0x100,
+  /// Register that may be renamed.
+  Renamable = 0x200,
+  DefineNoRead = Define | Undef,
+  ImplicitDefine = Implicit | Define,
+  ImplicitKill = Implicit | Kill
+};
 
 } // end namespace RegState