[llvm] 04b99a4 - [InstSimplify] simplify abs if operand is known non-negative

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2020-08-01T07:47:06-04:00
New Revision: 04b99a4d18cf13c13f1d76c5698696bcaef4e4b6

URL: https://github.com/llvm/llvm-project/commit/04b99a4d18cf13c13f1d76c5698696bcaef4e4b6
DIFF: https://github.com/llvm/llvm-project/commit/04b99a4d18cf13c13f1d76c5698696bcaef4e4b6.diff

LOG: [InstSimplify] simplify abs if operand is known non-negative

abs() should be rare enough that using value tracking is not going
to be a compile-time cost burden, so use it to reduce a variety of
potential patterns. We do this in DAGCombiner too.

Differential Revision: https://reviews.llvm.org/D85043

Added: 
    

Modified: 
    llvm/lib/Analysis/InstructionSimplify.cpp
    llvm/test/Transforms/InstSimplify/call.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index 38f3bbf4c6f5..d3928a502965 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -5255,6 +5255,12 @@ static Value *simplifyBinaryIntrinsic(Function *F, Value *Op0, Value *Op1,
   Type *ReturnType = F->getReturnType();
   unsigned BitWidth = ReturnType->getScalarSizeInBits();
   switch (IID) {
+  case Intrinsic::abs:
+    // If the sign bit is clear already, then abs does not do anything.
+    if (isKnownNonNegative(Op0, Q.DL, 0, Q.AC, Q.CxtI, Q.DT))
+      return Op0;
+    break;
+
   case Intrinsic::smax:
   case Intrinsic::smin:
   case Intrinsic::umax:

diff  --git a/llvm/test/Transforms/InstSimplify/call.ll b/llvm/test/Transforms/InstSimplify/call.ll
index e4fcf72327cc..2325dccd17a8 100644
--- a/llvm/test/Transforms/InstSimplify/call.ll
+++ b/llvm/test/Transforms/InstSimplify/call.ll
@@ -5,13 +5,12 @@
 declare i32 @llvm.abs.i32(i32, i1)
 declare <3 x i82> @llvm.abs.v3i82(<3 x i82>, i1)
 
-; TODO: If the sign bit is known zero, the abs is not needed.
+; If the sign bit is known zero, the abs is not needed.
 
 define i32 @zext_abs(i31 %x) {
 ; CHECK-LABEL: @zext_abs(
 ; CHECK-NEXT:    [[ZEXT:%.*]] = zext i31 [[X:%.*]] to i32
-; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[ZEXT]], i1 false)
-; CHECK-NEXT:    ret i32 [[ABS]]
+; CHECK-NEXT:    ret i32 [[ZEXT]]
 ;
   %zext = zext i31 %x to i32
   %abs = call i32 @llvm.abs.i32(i32 %zext, i1 false)
@@ -21,8 +20,7 @@ define i32 @zext_abs(i31 %x) {
 define <3 x i82> @lshr_abs(<3 x i82> %x) {
 ; CHECK-LABEL: @lshr_abs(
 ; CHECK-NEXT:    [[LSHR:%.*]] = lshr <3 x i82> [[X:%.*]], <i82 1, i82 1, i82 1>
-; CHECK-NEXT:    [[ABS:%.*]] = call <3 x i82> @llvm.abs.v3i82(<3 x i82> [[LSHR]], i1 true)
-; CHECK-NEXT:    ret <3 x i82> [[ABS]]
+; CHECK-NEXT:    ret <3 x i82> [[LSHR]]
 ;
   %lshr = lshr <3 x i82> %x, <i82 1, i82 1, i82 1>
   %abs = call <3 x i82> @llvm.abs.v3i82(<3 x i82> %lshr, i1 true)
@@ -32,8 +30,7 @@ define <3 x i82> @lshr_abs(<3 x i82> %x) {
 define i32 @and_abs(i32 %x) {
 ; CHECK-LABEL: @and_abs(
 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[X:%.*]], 2147483644
-; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 true)
-; CHECK-NEXT:    ret i32 [[ABS]]
+; CHECK-NEXT:    ret i32 [[AND]]
 ;
   %and = and i32 %x, 2147483644
   %abs = call i32 @llvm.abs.i32(i32 %and, i1 true)
@@ -43,8 +40,7 @@ define i32 @and_abs(i32 %x) {
 define <3 x i82> @select_abs(<3 x i1> %cond) {
 ; CHECK-LABEL: @select_abs(
 ; CHECK-NEXT:    [[SEL:%.*]] = select <3 x i1> [[COND:%.*]], <3 x i82> zeroinitializer, <3 x i82> <i82 2147483647, i82 42, i82 1>
-; CHECK-NEXT:    [[ABS:%.*]] = call <3 x i82> @llvm.abs.v3i82(<3 x i82> [[SEL]], i1 false)
-; CHECK-NEXT:    ret <3 x i82> [[ABS]]
+; CHECK-NEXT:    ret <3 x i82> [[SEL]]
 ;
   %sel = select <3 x i1> %cond, <3 x i82> zeroinitializer, <3 x i82> <i82 2147483647, i82 42, i82 1>
   %abs = call <3 x i82> @llvm.abs.v3i82(<3 x i82> %sel, i1 false)
@@ -57,8 +53,7 @@ define i32 @assume_abs(i32 %x) {
 ; CHECK-LABEL: @assume_abs(
 ; CHECK-NEXT:    [[ASSUME:%.*]] = icmp sge i32 [[X:%.*]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[ASSUME]])
-; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 true)
-; CHECK-NEXT:    ret i32 [[ABS]]
+; CHECK-NEXT:    ret i32 [[X]]
 ;
   %assume = icmp sge i32 %x, 0
   call void @llvm.assume(i1 %assume)