[llvm] 8c5edf5 - [SCEV] don't query getSCEV() for incomplete phis

Chen Zheng via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 31 23:50:14 PDT 2020


Author: Chen Zheng
Date: 2020-08-01T02:38:54-04:00
New Revision: 8c5edf50234f52e0de37df3e4e7cec92bdb70e12

URL: https://github.com/llvm/llvm-project/commit/8c5edf50234f52e0de37df3e4e7cec92bdb70e12
DIFF: https://github.com/llvm/llvm-project/commit/8c5edf50234f52e0de37df3e4e7cec92bdb70e12.diff

LOG: [SCEV] don't query getSCEV() for incomplete phis

querying getSCEV() for incomplete phis leads to wrong cache value in `ExprToIVMap`,
because incomplete phis may be simplified to same value before get SCEV expression.

Reviewed By: lebedev.ri, mkazantsev

Differential Revision: https://reviews.llvm.org/D77560

Added: 
    llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
    llvm/test/Transforms/LoopStrengthReduce/Power/lit.local.cfg

Modified: 
    llvm/include/llvm/IR/Instructions.h
    llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/IR/Instructions.h b/llvm/include/llvm/IR/Instructions.h
index 0afc585dfbe5..63194fa93cbc 100644
--- a/llvm/include/llvm/IR/Instructions.h
+++ b/llvm/include/llvm/IR/Instructions.h
@@ -27,6 +27,7 @@
 #include "llvm/IR/Attributes.h"
 #include "llvm/IR/BasicBlock.h"
 #include "llvm/IR/CallingConv.h"
+#include "llvm/IR/CFG.h"
 #include "llvm/IR/Constant.h"
 #include "llvm/IR/DerivedTypes.h"
 #include "llvm/IR/Function.h"
@@ -2743,6 +2744,15 @@ class PHINode : public Instruction {
   /// non-undef value.
   bool hasConstantOrUndefValue() const;
 
+  /// If the PHI node is complete which means all of its parent's predecessors
+  /// have incoming value in this PHI, return true, otherwise return false.
+  bool isComplete() const {
+    return llvm::all_of(predecessors(getParent()),
+                        [this](const BasicBlock *Pred) {
+                          return getBasicBlockIndex(Pred) >= 0;
+                        });
+  }
+
   /// Methods for support type inquiry through isa, cast, and dyn_cast:
   static bool classof(const Instruction *I) {
     return I->getOpcode() == Instruction::PHI;

diff  --git a/llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp b/llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
index d31bf6791075..555da5df65e1 100644
--- a/llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
+++ b/llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
@@ -1187,6 +1187,14 @@ SCEVExpander::getAddRecExprPHILiterally(const SCEVAddRecExpr *Normalized,
       if (!SE.isSCEVable(PN.getType()))
         continue;
 
+      // We should not look for a incomplete PHI. Getting SCEV for a incomplete
+      // PHI has no meaning at all.
+      if (!PN.isComplete()) {
+        DEBUG_WITH_TYPE(
+            DebugType, dbgs() << "One incomplete PHI is found: " << PN << "\n");
+        continue;
+      }
+
       const SCEVAddRecExpr *PhiSCEV = dyn_cast<SCEVAddRecExpr>(SE.getSCEV(&PN));
       if (!PhiSCEV)
         continue;
@@ -2102,6 +2110,8 @@ SCEVExpander::replaceCongruentIVs(Loop *L, const DominatorTree *DT,
     }
     DEBUG_WITH_TYPE(DebugType, dbgs() << "INDVARS: Eliminated congruent iv: "
                                       << *Phi << '\n');
+    DEBUG_WITH_TYPE(DebugType, dbgs() << "INDVARS: Original iv: "
+                                      << *OrigPhiRef << '\n');
     ++NumElim;
     Value *NewIV = OrigPhiRef;
     if (OrigPhiRef->getType() != Phi->getType()) {

diff  --git a/llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll b/llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
new file mode 100644
index 000000000000..2abdc54bbad7
--- /dev/null
+++ b/llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
@@ -0,0 +1,66 @@
+; REQUIRES: asserts
+; RUN: opt -loop-reduce -debug-only=loop-reduce -S  < %s 2>&1 | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-n32:64"
+target triple = "powerpc64le-unknown-linux-gnu"
+;
+; %lsr.iv2 and %lsr.iv10 are in same bb, but they are not equal since start
+; value are 
diff erent.
+;
+; %scevgep = getelementptr [0 x %0], [0 x %0]* %arg, i64 0, i64 99
+; %scevgep1 = bitcast %0* %scevgep to [0 x %0]*
+; %lsr.iv2 = phi [0 x %0]* [ %1, %bb18 ], [ %scevgep1, %bb ]
+;
+; %lsr.iv10 = phi [0 x %0]* [ %2, %bb18 ], [ %arg, %bb ]
+;
+; Make sure two incomplete phis will not be marked as congruent.
+;
+; CHECK: One incomplete PHI is found:   %[[IV:.*]] = phi [0 x %0]*
+; CHECK: One incomplete PHI is found:   %[[IV2:.*]] = phi [0 x %0]*
+; CHECK-NOT: Eliminated congruent iv:  %[[IV]]
+; CHECK-NOT: Original iv: %[[IV2]]
+; CHECK-NOT: Eliminated congruent iv:  %[[IV2]]
+; CHECK-NOT: Original iv: %[[IV]]
+
+%0 = type <{ float }>
+
+define void @foo([0 x %0]* %arg) {
+bb:
+  %i = getelementptr inbounds [0 x %0], [0 x %0]* %arg, i64 0, i64 -1
+  %i1 = bitcast %0* %i to i8*
+  %i2 = getelementptr i8, i8* %i1, i64 4
+  br label %bb3
+
+bb3:                                              ; preds = %bb18, %bb
+  %i4 = phi i64 [ %i20, %bb18 ], [ 0, %bb ]
+  %i5 = phi i64 [ %i21, %bb18 ], [ 1, %bb ]
+  br i1 undef, label %bb22, label %bb9
+
+bb9:                                              ; preds = %bb9, %bb3
+  %i10 = phi i64 [ 0, %bb3 ], [ %i16, %bb9 ]
+  %i11 = add i64 %i10, %i4
+  %i12 = shl i64 %i11, 2
+  %i13 = getelementptr i8, i8* %i2, i64 %i12
+  %i14 = bitcast i8* %i13 to float*
+  %i15 = bitcast float* %i14 to <4 x float>*
+  store <4 x float> undef, <4 x float>* %i15, align 4
+  %i16 = add i64 %i10, 32
+  br i1 true, label %bb17, label %bb9
+
+bb17:                                             ; preds = %bb9
+  br i1 undef, label %bb18, label %bb22
+
+bb18:                                             ; preds = %bb17
+  %i19 = add i64 undef, %i4
+  %i20 = add i64 %i19, %i5
+  %i21 = add nuw nsw i64 %i5, 1
+  br label %bb3
+
+bb22:                                             ; preds = %bb22, %bb17, %bb3
+  %i23 = phi i64 [ %i26, %bb22 ], [ undef, %bb17 ], [ 100, %bb3 ]
+  %i24 = add nsw i64 %i23, %i4
+  %i25 = getelementptr %0, %0* %i, i64 %i24, i32 0
+  store float undef, float* %i25, align 4
+  %i26 = add nuw nsw i64 %i23, 1
+  br label %bb22
+}

diff  --git a/llvm/test/Transforms/LoopStrengthReduce/Power/lit.local.cfg b/llvm/test/Transforms/LoopStrengthReduce/Power/lit.local.cfg
new file mode 100644
index 000000000000..091332439b18
--- /dev/null
+++ b/llvm/test/Transforms/LoopStrengthReduce/Power/lit.local.cfg
@@ -0,0 +1,2 @@
+if not 'PowerPC' in config.root.targets:
+    config.unsupported = True


        


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