[llvm] 0e0aebc - [ValueTracking] Add ComputeNumSignBits support for llvm.abs intrinsic

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-07-31T10:59:12-07:00
New Revision: 0e0aebc5273c6d676584ecb50ed49e888029c2de

URL: https://github.com/llvm/llvm-project/commit/0e0aebc5273c6d676584ecb50ed49e888029c2de
DIFF: https://github.com/llvm/llvm-project/commit/0e0aebc5273c6d676584ecb50ed49e888029c2de.diff

LOG: [ValueTracking] Add ComputeNumSignBits support for llvm.abs intrinsic

If absolute value needs turn a negative number into a positive number it reduces the number of sign bits by at most 1.

Differential Revision: https://reviews.llvm.org/D84971

Added: 
    

Modified: 
    llvm/lib/Analysis/ValueTracking.cpp
    llvm/test/Transforms/InstCombine/abs-intrinsic.ll

Removed: 
    


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diff  --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 52132072a7d1..4cd2d07bf4b0 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -3001,6 +3001,19 @@ static unsigned ComputeNumSignBitsImpl(const Value *V,
              "Failed to determine minimum sign bits");
       return Tmp;
     }
+    case Instruction::Call: {
+      if (const auto *II = dyn_cast<IntrinsicInst>(U)) {
+        switch (II->getIntrinsicID()) {
+        default: break;
+        case Intrinsic::abs:
+          Tmp = ComputeNumSignBits(U->getOperand(0), Depth + 1, Q);
+          if (Tmp == 1) break;
+
+          // Absolute value reduces number of sign bits by at most 1.
+          return Tmp - 1;
+        }
+      }
+    }
     }
   }
 

diff  --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
index 780f28238bf6..8b965b3d1e44 100644
--- a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
@@ -51,3 +51,18 @@ define i32 @abs_trailing_zeros_negative(i32 %x) {
   %and2 = and i32 %abs, -4
   ret i32 %and2
 }
+
+; Make sure we infer this add doesn't overflow. The input to the abs has 3
+; sign bits, the abs reduces this to 2 sign bits.
+define i32 @abs_signbits(i30 %x) {
+; CHECK-LABEL: @abs_signbits(
+; CHECK-NEXT:    [[AND:%.*]] = sext i30 [[X:%.*]] to i32
+; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 false)
+; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[ABS]], 1
+; CHECK-NEXT:    ret i32 [[ADD]]
+;
+  %ext = sext i30 %x to i32
+  %abs = call i32 @llvm.abs.i32(i32 %ext, i1 false)
+  %add = add i32 %abs, 1
+  ret i32 %add
+}