[llvm] 9b04fec - [PowerPC] Retrieve the offset from load/store if it stores to stack slots
QingShan Zhang via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 31 00:12:56 PDT 2020
Author: QingShan Zhang
Date: 2020-07-31T07:08:20Z
New Revision: 9b04fec0021112d913058e81bf864e4f33c33dcc
URL: https://github.com/llvm/llvm-project/commit/9b04fec0021112d913058e81bf864e4f33c33dcc
DIFF: https://github.com/llvm/llvm-project/commit/9b04fec0021112d913058e81bf864e4f33c33dcc.diff
LOG: [PowerPC] Retrieve the offset from load/store if it stores to stack slots
Scheduler will try to retrieve the offset and base addr to determine if two
loads/stores are disjoint memory access. PowerPC failed to handle this for
frame index which will bring extra memory dependency for loads/stores.
Reviewed By: jji
Differential Revision: https://reviews.llvm.org/D84308
Added:
Modified:
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/test/CodeGen/PowerPC/aix-cc-byval-split.ll
llvm/test/CodeGen/PowerPC/aix-cc-byval.ll
llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 34618ed05805..888a77464f34 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -4624,7 +4624,8 @@ bool PPCInstrInfo::getMemOperandWithOffsetWidth(
// Handle only loads/stores with base register followed by immediate offset.
if (LdSt.getNumExplicitOperands() != 3)
return false;
- if (!LdSt.getOperand(1).isImm() || !LdSt.getOperand(2).isReg())
+ if (!LdSt.getOperand(1).isImm() ||
+ (!LdSt.getOperand(2).isReg() && !LdSt.getOperand(2).isFI()))
return false;
if (!LdSt.hasOneMemOperand())
diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-byval-split.ll b/llvm/test/CodeGen/PowerPC/aix-cc-byval-split.ll
index e9155f236c9e..6372f9ef17d6 100644
--- a/llvm/test/CodeGen/PowerPC/aix-cc-byval-split.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-cc-byval-split.ll
@@ -36,18 +36,18 @@ entry:
; CHECK32: bb.0.entry:
; CHECK32-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
+; CHECK32: renamable $r[[REG1:[0-9]+]] = LWZ 84, %fixed-stack.0
; CHECK32-DAG: STW killed renamable $r3, 0, %fixed-stack.0 :: (store 4 into %fixed-stack.0
; CHECK32-DAG: STW killed renamable $r4, 4, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 4
+; CHECK32: renamable $r[[REG2:[0-9]+]] = LWZ 80, %fixed-stack.0
; CHECK32-DAG: STW killed renamable $r5, 8, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 8
; CHECK32-DAG: STW killed renamable $r6, 12, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 12
; CHECK32-DAG: STW renamable $r7, 16, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 16
; CHECK32-DAG: STW renamable $r8, 20, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 20
; CHECK32-DAG: STW killed renamable $r9, 24, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 24
-; CHECK32-DAG: STW killed renamable $r10, 28, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 28
-; CHECK32: renamable $r[[REG1:[0-9]+]] = LWZ 84, %fixed-stack.0
-; CHECK32: renamable $r[[REG2:[0-9]+]] = LWZ 80, %fixed-stack.0
; CHECK32: renamable $r4 = ADDC killed renamable $r8, killed renamable $r[[REG1]], implicit-def $carry
; CHECK32: renamable $r3 = ADDE killed renamable $r7, killed renamable $r[[REG2]], implicit-def dead $carry, implicit killed $carry
+; CHECK32 STW killed renamable $r10, 28, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 28
; CHECK32: BLR implicit $lr, implicit $rm, implicit $r3, implicit $r4
@@ -68,6 +68,7 @@ entry:
; CHECK64: bb.0.entry:
; CHECK64: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
+; CHECK64: renamable $x[[REG1:[0-9]+]] = LD 80, %fixed-stack.0
; CHECK64: STD killed renamable $x3, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0
; CHECK64: STD killed renamable $x4, 8, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 8
; CHECK64: STD renamable $x5, 16, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 16
@@ -75,7 +76,6 @@ entry:
; CHECK64: STD killed renamable $x7, 32, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 32
; CHECK64: STD killed renamable $x8, 40, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 40
; CHECK64: STD killed renamable $x9, 48, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 48
-; CHECK64: STD killed renamable $x10, 56, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 56
-; CHECK64: renamable $x[[REG1:[0-9]+]] = LD 80, %fixed-stack.0
; CHECK64: renamable $x3 = ADD8 killed renamable $x5, killed renamable $x[[REG1]]
+; CHECK64: STD killed renamable $x10, 56, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 56
; CHECK64: BLR8 implicit $lr8, implicit $rm, implicit $x3
diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll b/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll
index dd401d159fc9..bccb28ef2290 100644
--- a/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll
@@ -756,15 +756,15 @@ entry:
; 32BIT: bb.0.entry:
; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
+; 32BIT: STW killed renamable $r8, 20, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 20
; 32BIT-DAG: STW killed renamable $r3, 0, %fixed-stack.0 :: (store 4 into %fixed-stack.0
; 32BIT-DAG: STW killed renamable $r4, 4, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 4
; 32BIT-DAG: STW killed renamable $r5, 8, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 8
; 32BIT-DAG: STW killed renamable $r6, 12, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 12
; 32BIT-DAG: STW killed renamable $r7, 16, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 16
-; 32BIT-DAG: STW killed renamable $r8, 20, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 20
+; 32BIT: renamable $r3 = LBZ 21, %fixed-stack.0 :: (dereferenceable load 1
; 32BIT-DAG: STW killed renamable $r9, 24, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 24
; 32BIT-DAG: STW killed renamable $r10, 28, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 28
-; 32BIT: renamable $r3 = LBZ 21, %fixed-stack.0 :: (dereferenceable load 1
; 32BIT: BLR
; 64BIT: fixedStack:
@@ -773,11 +773,11 @@ entry:
; 64BIT: bb.0.entry:
; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
+; 64BIT: STD killed renamable $x5, 16, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 16
; 64BIT-DAG: STD killed renamable $x3, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0
+; 64BIT-NEXT: renamable $x3 = LBZ8 21, %fixed-stack.0 :: (dereferenceable load 1
; 64BIT-DAG: STD killed renamable $x4, 8, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 8
-; 64BIT-DAG: STD killed renamable $x5, 16, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 16
; 64BIT-DAG: STD killed renamable $x6, 24, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 24
-; 64BIT-NEXT: renamable $x3 = LBZ8 21, %fixed-stack.0 :: (dereferenceable load 1
; 64BIT-NEXT: BLR8
; ASM-LABEL: .test_byval_32Byte:
@@ -901,9 +901,9 @@ entry:
; 32BIT-DAG: STW killed renamable $r6, 12, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 12
; 32BIT-DAG: STW killed renamable $r7, 16, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 16
; 32BIT-DAG: STW killed renamable $r8, 20, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 20
+; 32BIT-NEXT: renamable $f1 = LFD 16, %fixed-stack.0 :: (dereferenceable load 8
; 32BIT-DAG: STW killed renamable $r9, 24, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 24
; 32BIT-DAG: STW killed renamable $r10, 28, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 28
-; 32BIT-NEXT: renamable $f1 = LFD 16, %fixed-stack.0 :: (dereferenceable load 8
; 32BIT-NEXT: BLR
; 64BIT: fixedStack:
@@ -913,10 +913,10 @@ entry:
; 64BIT: bb.0.entry:
; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
; 64BIT-DAG: STD killed renamable $x3, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0
-; 64BIT-DAG: STD killed renamable $x4, 8, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 8
; 64BIT-DAG: STD killed renamable $x5, 16, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 16
-; 64BIT-DAG: STD killed renamable $x6, 24, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 24
; 64BIT-NEXT: renamable $f1 = LFD 16, %fixed-stack.0 :: (dereferenceable load 8
+; 64BIT-DAG: STD killed renamable $x4, 8, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 8
+; 64BIT-DAG: STD killed renamable $x6, 24, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 24
; 64BIT-NEXT: BLR8
; ASM32-LABEL: .test_byval_31Byte:
diff --git a/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll b/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
index c276d4ccc395..cb1544ef9756 100644
--- a/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
@@ -74,9 +74,9 @@
; 32BIT-DAG: renamable $r11 = ADDI %fixed-stack.0, 0
; 32BIT-DAG: STW renamable $r11, 0, %stack.0.arg1 :: (store 4 into %ir.0)
; 32BIT-DAG: STW renamable $r4, 0, %stack.0.arg1 :: (store 4 into %ir.arg1)
-; 32BIT-DAG: renamable $r5 = LWZ 0, %fixed-stack.0 :: (load 4 from %ir.2)
+; 32BIT-DAG: renamable $r6 = LWZ 0, %fixed-stack.0 :: (load 4 from %ir.2)
; 32BIT-DAG: renamable $r4 = LWZ 0, %fixed-stack.0 :: (load 4 from %ir.4)
-; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r5, killed renamable $r3
+; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r6, killed renamable $r3
; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
; 32BIT-DAG: BLR implicit $lr, implicit $rm, implicit $r3
diff --git a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
index 6d3a71193fa9..7ee8dd0a3712 100644
--- a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
@@ -63,15 +63,15 @@
; 64BIT-DAG: STD killed renamable $x10, 48, %fixed-stack.0 :: (store 8)
; 64BIT-DAG: renamable $x11 = ADDI8 %fixed-stack.0, 0
; 64BIT-DAG: STD renamable $x11, 0, %stack.1.arg2 :: (store 8 into %ir.1)
-; 64BIT-DAG: renamable $x4 = LD 0, %stack.1.arg2 :: (load 8 from %ir.arg2)
-; 64BIT-DAG: renamable $x7 = ADDI8 renamable $x4, 4
-; 64BIT-DAG: renamable $x5 = ADDI8 %fixed-stack.0, 4
-; 64BIT-DAG: renamable $r6 = LWZ 0, %fixed-stack.0 :: (load 4 from %fixed-stack.0, align 8)
+; 64BIT-DAG: renamable $x6 = LD 0, %stack.1.arg2 :: (load 8 from %ir.arg2)
+; 64BIT-DAG: renamable $x9 = ADDI8 renamable $x6, 4
+; 64BIT-DAG: renamable $x7 = ADDI8 %fixed-stack.0, 4
+; 64BIT-DAG: renamable $r8 = LWZ 0, %fixed-stack.0 :: (load 4 from %fixed-stack.0, align 8)
; 64BIT-DAG: STD killed renamable $x11, 0, %stack.0.arg1 :: (store 8 into %ir.0)
-; 64BIT-DAG: STD killed renamable $x5, 0, %stack.0.arg1 :: (store 8 into %ir.arg1)
-; 64BIT-DAG: STD killed renamable $x7, 0, %stack.1.arg2 :: (store 8 into %ir.arg2)
-; 64BIT-DAG: renamable $r4 = LWZ 0, killed renamable $x4 :: (load 4)
-; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r6, renamable $r3, implicit killed $x3
+; 64BIT-DAG: STD killed renamable $x7, 0, %stack.0.arg1 :: (store 8 into %ir.arg1)
+; 64BIT-DAG: STD killed renamable $x9, 0, %stack.1.arg2 :: (store 8 into %ir.arg2)
+; 64BIT-DAG: renamable $r4 = LWZ 0, killed renamable $x6 :: (load 4)
+; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r8, renamable $r3, implicit killed $x3
; 64BIT-DAG: renamable $r4 = RLWINM killed renamable $r4, 1, 0, 30
; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4, implicit-def $x3
; 64BIT-DAG: BLR8 implicit $lr8, implicit $rm, implicit $x3
@@ -225,14 +225,14 @@
; 64BIT-DAG: STD killed renamable $x9, 40, %fixed-stack.0 :: (store 8)
; 64BIT-DAG: STD killed renamable $x10, 48, %fixed-stack.0 :: (store 8)
; 64BIT-DAG: STD renamable $x3, 0, %stack.1.arg2 :: (store 8 into %ir.1)
-; 64BIT-DAG: renamable $x4 = LD 0, %stack.1.arg2 :: (load 8 from %ir.arg2)
-; 64BIT-DAG: renamable $x5 = ADDI8 %fixed-stack.0, 8
+; 64BIT-DAG: renamable $x6 = LD 0, %stack.1.arg2 :: (load 8 from %ir.arg2)
+; 64BIT-DAG: renamable $x7 = ADDI8 %fixed-stack.0, 8
; 64BIT-DAG: STD killed renamable $x3, 0, %stack.0.arg1 :: (store 8 into %ir.0)
-; 64BIT-DAG: STD killed renamable $x5, 0, %stack.0.arg1 :: (store 8 into %ir.arg1)
+; 64BIT-DAG: STD killed renamable $x7, 0, %stack.0.arg1 :: (store 8 into %ir.arg1)
; 64BIT-DAG: renamable $f0 = LFD 0, %fixed-stack.0 :: (load 8)
-; 64BIT-DAG: renamable $x3 = ADDI8 renamable $x4, 8
+; 64BIT-DAG: renamable $x3 = ADDI8 renamable $x6, 8
; 64BIT-DAG: STD killed renamable $x3, 0, %stack.1.arg2 :: (store 8 into %ir.arg2)
-; 64BIT-DAG: renamable $f2 = LFD 0, killed renamable $x4 :: (load 8)
+; 64BIT-DAG: renamable $f2 = LFD 0, killed renamable $x6 :: (load 8)
; 64BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f2, renamable $f2, implicit $rm
; 64BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
More information about the llvm-commits
mailing list