[PATCH] D84308: [PowerPC] Retrieve the offset from load/store if it stores to stack slots

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/aix-cc-byval.ll:759
 ; 32BIT-NEXT:   liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
+; 32BIT-DAG:    STW killed renamable $r8,  20, %fixed-stack.0 :: (store 4 into %fixed-stack.0 + 20
 ; 32BIT-DAG:    STW killed renamable $r3,   0, %fixed-stack.0 :: (store 4 into %fixed-stack.0
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jsji wrote:
> Nit: this shouldn't be DAG -- STW 20 should be before others because of following overlapped LBZ.
The DAG here means all the STW 20/0/4/8/12/16 are position independent. And then, we have a 32BIT as barrier, and then, another two position independent check which looks right from me.


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Comment at: llvm/test/CodeGen/PowerPC/aix-cc-byval.ll:777
 ; 64BIT-DAG:    STD killed renamable $x3, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0
-; 64BIT-DAG:    STD killed renamable $x4, 8, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 8
 ; 64BIT-DAG:    STD killed renamable $x5, 16, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 16
 ; 64BIT-NEXT:   renamable $x3 = LBZ8 21, %fixed-stack.0 :: (dereferenceable load 1
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jsji wrote:
> This should not be DAG as well. `STD killed renamable $x5, 16` should be before `STD killed renamable $x3,0` because of  dependent LBZ8.
STD 16 and STD 0 are independent store, so, we need the DAG here. And then, 64BIT-NEXT works as a barrier as it has dependent with above two stores. So, the DAG here looks right also. 


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