[PATCH] D84910: [AMDGPU] Make GCNRegBankReassign assign based on subreg banks

[Carl Ritson via Phabricator via llvm-commits]

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When scavenging consider the sub-register of the source operand
to determine the bank of a candidate register (not just sub0).
Without this it is possible to introduce an infinite loop,
e.g. $sgpr15_sgpr16_sgpr17 can be assigned for a conflict between
$sgpr0 and SGPR_96:sub1.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84910

Files:
  llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
  llvm/test/CodeGen/AMDGPU/regbank-reassign.mir

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