[llvm] 66c572a - GlobalISel: Handle assorted no-op intrinsics

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 29 18:26:28 PDT 2020


Author: Matt Arsenault
Date: 2020-07-29T21:26:20-04:00
New Revision: 66c572af5504b1eff32d221291041081af835256

URL: https://github.com/llvm/llvm-project/commit/66c572af5504b1eff32d221291041081af835256
DIFF: https://github.com/llvm/llvm-project/commit/66c572af5504b1eff32d221291041081af835256.diff

LOG: GlobalISel: Handle assorted no-op intrinsics

SelectionDAGBuilder just drops these, so do the same.

Added: 
    llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll

Modified: 
    llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 9adf3d1a89a3..f9b084317819 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -1645,6 +1645,16 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
   }
   case Intrinsic::invariant_end:
     return true;
+  case Intrinsic::expect:
+  case Intrinsic::annotation:
+  case Intrinsic::ptr_annotation:
+  case Intrinsic::launder_invariant_group:
+  case Intrinsic::strip_invariant_group: {
+    // Drop the intrinsic, but forward the value.
+    MIRBuilder.buildCopy(getOrCreateVReg(CI),
+                         getOrCreateVReg(*CI.getArgOperand(0)));
+    return true;
+  }
   case Intrinsic::assume:
   case Intrinsic::var_annotation:
   case Intrinsic::sideeffect:

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
new file mode 100644
index 000000000000..dc243b74375d
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
@@ -0,0 +1,79 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -global-isel -O0 -mtriple=aarch64-- -stop-after=irtranslator -verify-machineinstrs -o - %s | FileCheck %s
+
+define i64 @expect_i64(i64 %arg0) {
+  ; CHECK-LABEL: name: expect_i64
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   liveins: $x0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
+  ; CHECK:   $x0 = COPY [[COPY1]](s64)
+  ; CHECK:   RET_ReallyLR implicit $x0
+  %expval = call i64 @llvm.expect.i64(i64 %arg0, i64 1)
+  ret i64 %expval
+}
+
+define i8* @ptr_annotate(i8* %arg0, i8* %arg1, i8* %arg2, i32 %arg3) {
+  ; CHECK-LABEL: name: ptr_annotate
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   liveins: $w3, $x0, $x1, $x2
+  ; CHECK:   [[COPY:%[0-9]+]]:_(p0) = COPY $x0
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
+  ; CHECK:   [[COPY2:%[0-9]+]]:_(p0) = COPY $x2
+  ; CHECK:   [[COPY3:%[0-9]+]]:_(s32) = COPY $w3
+  ; CHECK:   [[COPY4:%[0-9]+]]:_(p0) = COPY [[COPY]](p0)
+  ; CHECK:   $x0 = COPY [[COPY4]](p0)
+  ; CHECK:   RET_ReallyLR implicit $x0
+  %call = call i8* @llvm.ptr.annotation.p0i8(i8* %arg0, i8* %arg1, i8* %arg2, i32 %arg3)
+  ret i8* %call
+}
+
+ at .str = private unnamed_addr constant [4 x i8] c"sth\00", section "llvm.metadata"
+ at .str1 = private unnamed_addr constant [4 x i8] c"t.c\00", section "llvm.metadata"
+
+define i32 @annotation(i32 %a) {
+  ; CHECK-LABEL: name: annotation
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   liveins: $w0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+  ; CHECK:   $w0 = COPY [[COPY1]](s32)
+  ; CHECK:   RET_ReallyLR implicit $w0
+  %call = call i32 @llvm.annotation.i32(i32 %a, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str1, i32 0, i32 0), i32 2)
+  ret i32 %call
+}
+
+define i8* @launder_invariant_group(i8* %p) {
+  ; CHECK-LABEL: name: launder_invariant_group
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   liveins: $x0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(p0) = COPY $x0
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p0)
+  ; CHECK:   $x0 = COPY [[COPY1]](p0)
+  ; CHECK:   RET_ReallyLR implicit $x0
+  %q = call i8* @llvm.launder.invariant.group.p0i8(i8* %p)
+  ret i8* %q
+}
+
+define i8* @strip_invariant_group(i8* %p) {
+  ; CHECK-LABEL: name: strip_invariant_group
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   liveins: $x0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(p0) = COPY $x0
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p0)
+  ; CHECK:   $x0 = COPY [[COPY1]](p0)
+  ; CHECK:   RET_ReallyLR implicit $x0
+  %q = call i8* @llvm.strip.invariant.group.p0i8(i8* %p)
+  ret i8* %q
+}
+
+declare i64 @llvm.expect.i64(i64, i64) #0
+declare i8* @llvm.ptr.annotation.p0i8(i8*, i8*, i8*, i32) #1
+declare i32 @llvm.annotation.i32(i32, i8*, i8*, i32) #1
+declare i8* @llvm.launder.invariant.group.p0i8(i8*) #2
+declare i8* @llvm.strip.invariant.group.p0i8(i8*) #3
+
+attributes #0 = { nounwind readnone willreturn }
+attributes #1 = { nounwind willreturn }
+attributes #2 = { inaccessiblememonly nounwind speculatable willreturn }
+attributes #3 = { nounwind readnone speculatable willreturn }


        


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