[PATCH] D84796: [LV] Add abs/smin/smax/umin/umax intrinsics to isTriviallyVectorizable

[Craig Topper via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG3efc978baede: [LV] Add abs/smin/smax/umin/umax intrinsics to isTriviallyVectorizable (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D84796/new/

https://reviews.llvm.org/D84796

Files:
  llvm/lib/Analysis/VectorUtils.cpp
  llvm/test/Transforms/LoopVectorize/intrinsic.ll

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