[llvm] 5f802be - GlobalISel: Don't fail translate on intrinsics with metadata

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-07-27T19:00:25-04:00
New Revision: 5f802be4e554f4eeb2c2c4137bed91b5b4ae740e

URL: https://github.com/llvm/llvm-project/commit/5f802be4e554f4eeb2c2c4137bed91b5b4ae740e
DIFF: https://github.com/llvm/llvm-project/commit/5f802be4e554f4eeb2c2c4137bed91b5b4ae740e.diff

LOG: GlobalISel: Don't fail translate on intrinsics with metadata

Added: 
    llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll

Modified: 
    llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index e6b3d51bf1ec..6433c13e990b 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -1758,10 +1758,6 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
     MIB->copyIRFlags(CI);
 
   for (auto &Arg : enumerate(CI.arg_operands())) {
-    // Some intrinsics take metadata parameters. Reject them.
-    if (isa<MetadataAsValue>(Arg.value()))
-      return false;
-
     // If this is required to be an immediate, don't materialize it in a
     // register.
     if (CI.paramHasAttr(Arg.index(), Attribute::ImmArg)) {
@@ -1774,6 +1770,11 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
       } else {
         MIB.addFPImm(cast<ConstantFP>(Arg.value()));
       }
+    } else if (auto MD = dyn_cast<MetadataAsValue>(Arg.value())) {
+      auto *MDN = dyn_cast<MDNode>(MD->getMetadata());
+      if (!MDN) // This was probably an MDString.
+        return false;
+      MIB.addMetadata(MDN);
     } else {
       ArrayRef<Register> VRegs = getOrCreateVRegs(*Arg.value());
       if (VRegs.size() > 1)

diff  --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
new file mode 100644
index 000000000000..6a3b3b812866
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
@@ -0,0 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -global-isel -march=amdgcn -mcpu=gfx900 -stop-after=irtranslator -o - %s | FileCheck %s
+; Make sure intrinsics with metadata arguments are translated
+
+define i32 @reloc_constant() {
+  ; CHECK-LABEL: name: reloc_constant
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   liveins: $sgpr30_sgpr31
+  ; CHECK:   [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
+  ; CHECK:   [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.reloc.constant), !0
+  ; CHECK:   $vgpr0 = COPY [[INT]](s32)
+  ; CHECK:   [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]]
+  ; CHECK:   S_SETPC_B64_return [[COPY1]], implicit $vgpr0
+  %val = call i32 @llvm.amdgcn.reloc.constant(metadata !0)
+  ret i32 %val
+}
+
+declare i32 @llvm.amdgcn.reloc.constant(metadata) #0
+
+attributes #0 = { nounwind readnone speculatable willreturn }
+
+!0 = !{!"arst"}