[PATCH] D82788: AMDGPU: Fix alignment requirements for 96bit and 128bit local loads and stores

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPU.td:109
+// LDS alignment enforcement is controlled by a configuration register:
+// SH_MEM_CONFIG.alignment_mode
+def FeatureUnalignedDSAccess : SubtargetFeature<"unaligned-ds-access",
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I believe this also controls vmem, so the "dynamic" control could be named something not-DS specific like "unaligned-access-mode" or something?


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Comment at: llvm/lib/Target/AMDGPU/AMDGPU.td:116-120
+def FeatureRequiresDSAlignment : SubtargetFeature<"requires-ds-alignment",
+  "RequiresDSAlignment",
+  "true",
+  "Requires 16 byte alignment for certain local and region loads and stores"
+>;
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It would be better to invert this, so requiring aligned access it the default. unaligned-ds-access?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82788/new/

https://reviews.llvm.org/D82788