[llvm] 0d3a5d0 - [NFC][PowerPC] Updated a number of Power PC tests used for PC Relative

Stefan Pintilie via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 21 10:46:38 PDT 2020


Author: Stefan Pintilie
Date: 2020-07-21T12:28:56-05:00
New Revision: 0d3a5d09e3efae848b59db6497813bdda5fc951c

URL: https://github.com/llvm/llvm-project/commit/0d3a5d09e3efae848b59db6497813bdda5fc951c
DIFF: https://github.com/llvm/llvm-project/commit/0d3a5d09e3efae848b59db6497813bdda5fc951c.diff

LOG: [NFC][PowerPC] Updated a number of Power PC tests used for PC Relative

Updated the tests to use -mcpu=pwr10 instead of -mcpu=future.
Updated the tests to include Big Endian testing.

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/constant-pool.ll
    llvm/test/CodeGen/PowerPC/global-address-non-got-indirect-access.ll
    llvm/test/CodeGen/PowerPC/pcrel-block-address.ll
    llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
    llvm/test/CodeGen/PowerPC/pcrel-call-linkage-simple.ll
    llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
    llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll
    llvm/test/CodeGen/PowerPC/pcrel-indirect-call.ll
    llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
    llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll
    llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll
    llvm/test/CodeGen/PowerPC/pcrel.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/constant-pool.ll b/llvm/test/CodeGen/PowerPC/constant-pool.ll
index 4355cfa6ba21..af2d82388496 100644
--- a/llvm/test/CodeGen/PowerPC/constant-pool.ll
+++ b/llvm/test/CodeGen/PowerPC/constant-pool.ll
@@ -1,5 +1,7 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
 
  define float @FloatConstantPool() {
 ; CHECK-LABEL: FloatConstantPool:

diff  --git a/llvm/test/CodeGen/PowerPC/global-address-non-got-indirect-access.ll b/llvm/test/CodeGen/PowerPC/global-address-non-got-indirect-access.ll
index 5c49760a9f45..af88fa02c266 100644
--- a/llvm/test/CodeGen/PowerPC/global-address-non-got-indirect-access.ll
+++ b/llvm/test/CodeGen/PowerPC/global-address-non-got-indirect-access.ll
@@ -1,6 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
+; RUN:   | FileCheck %s
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
 ; RUN:   | FileCheck %s
 
  @_ZL13StaticBoolVar = internal unnamed_addr global i8 0, align 1

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-block-address.ll b/llvm/test/CodeGen/PowerPC/pcrel-block-address.ll
index b7219da94027..76eea940aeef 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-block-address.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-block-address.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
 define dso_local void @blockaddress() {
 ; CHECK-LABEL: blockaddress:
 ; CHECK:       # %bb.0: # %entry

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
index 498963371c9c..9141fdc735a0 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
@@ -1,5 +1,8 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names < %s \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s \
+; RUN:   | FileCheck %s --check-prefixes=CHECK-S,CHECK-ALL
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK-S,CHECK-ALL
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names < %s \

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-simple.ll b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-simple.ll
index 649aecf8f720..013ae7345956 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-simple.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-simple.ll
@@ -1,8 +1,14 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names < %s \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s \
 ; RUN:   | FileCheck %s --check-prefix=CHECK-S
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names --filetype=obj < %s | \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names --filetype=obj < %s | \
+; RUN:   llvm-objdump -dr - | FileCheck %s --check-prefix=CHECK-O
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s \
+; RUN:   | FileCheck %s --check-prefix=CHECK-S
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names --filetype=obj < %s | \
 ; RUN:   llvm-objdump -dr - | FileCheck %s --check-prefix=CHECK-O
 
 

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
index bb6b5052ee58..1bad2e726341 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
@@ -1,5 +1,8 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names < %s \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s \
+; RUN:   | FileCheck %s --check-prefixes=CHECK-S,CHECK-ALL
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK-S,CHECK-ALL
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr9 -ppc-asm-full-reg-names < %s \

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll b/llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll
index c838308f3aa6..625d91d2eb5b 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll
@@ -1,7 +1,11 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
-; RUN:   | FileCheck %s
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
+; RUN:   | FileCheck %s --check-prefix=LE
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s \
+; RUN:   | FileCheck %s --check-prefix=BE
+
 
 %struct.Struct = type { i8, i16, i32 }
 
@@ -16,11 +20,17 @@
 @ptrfunc = external local_unnamed_addr global void (...)*, align 8
 
 define dso_local signext i32 @ReadGlobalVarChar() local_unnamed_addr  {
-; CHECK-LABEL: ReadGlobalVarChar:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valChar at got@pcrel(0), 1
-; CHECK-NEXT:    lbz r3, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: ReadGlobalVarChar:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valChar at got@pcrel(0), 1
+; LE-NEXT:    lbz r3, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: ReadGlobalVarChar:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valChar at got@pcrel(0), 1
+; BE-NEXT:    lbz r3, 0(r3)
+; BE-NEXT:    blr
 entry:
   %0 = load i8, i8* @valChar, align 1
   %conv = zext i8 %0 to i32
@@ -28,23 +38,36 @@ entry:
 }
 
 define dso_local void @WriteGlobalVarChar() local_unnamed_addr  {
-; CHECK-LABEL: WriteGlobalVarChar:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valChar at got@pcrel(0), 1
-; CHECK-NEXT:    li r4, 3
-; CHECK-NEXT:    stb r4, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: WriteGlobalVarChar:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valChar at got@pcrel(0), 1
+; LE-NEXT:    li r4, 3
+; LE-NEXT:    stb r4, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: WriteGlobalVarChar:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valChar at got@pcrel(0), 1
+; BE-NEXT:    li r4, 3
+; BE-NEXT:    stb r4, 0(r3)
+; BE-NEXT:    blr
 entry:
   store i8 3, i8* @valChar, align 1
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalVarShort() local_unnamed_addr  {
-; CHECK-LABEL: ReadGlobalVarShort:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valShort at got@pcrel(0), 1
-; CHECK-NEXT:    lha r3, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: ReadGlobalVarShort:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valShort at got@pcrel(0), 1
+; LE-NEXT:    lha r3, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: ReadGlobalVarShort:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valShort at got@pcrel(0), 1
+; BE-NEXT:    lha r3, 0(r3)
+; BE-NEXT:    blr
 entry:
   %0 = load i16, i16* @valShort, align 2
   %conv = sext i16 %0 to i32
@@ -52,69 +75,108 @@ entry:
 }
 
 define dso_local void @WriteGlobalVarShort() local_unnamed_addr  {
-; CHECK-LABEL: WriteGlobalVarShort:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valShort at got@pcrel(0), 1
-; CHECK-NEXT:    li r4, 3
-; CHECK-NEXT:    sth r4, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: WriteGlobalVarShort:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valShort at got@pcrel(0), 1
+; LE-NEXT:    li r4, 3
+; LE-NEXT:    sth r4, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: WriteGlobalVarShort:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valShort at got@pcrel(0), 1
+; BE-NEXT:    li r4, 3
+; BE-NEXT:    sth r4, 0(r3)
+; BE-NEXT:    blr
 entry:
   store i16 3, i16* @valShort, align 2
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalVarInt() local_unnamed_addr  {
-; CHECK-LABEL: ReadGlobalVarInt:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valInt at got@pcrel(0), 1
-; CHECK-NEXT:    lwa r3, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: ReadGlobalVarInt:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valInt at got@pcrel(0), 1
+; LE-NEXT:    lwa r3, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: ReadGlobalVarInt:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valInt at got@pcrel(0), 1
+; BE-NEXT:    lwa r3, 0(r3)
+; BE-NEXT:    blr
 entry:
   %0 = load i32, i32* @valInt, align 4
   ret i32 %0
 }
 
 define dso_local void @WriteGlobalVarInt() local_unnamed_addr  {
-; CHECK-LABEL: WriteGlobalVarInt:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valInt at got@pcrel(0), 1
-; CHECK-NEXT:    li r4, 33
-; CHECK-NEXT:    stw r4, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: WriteGlobalVarInt:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valInt at got@pcrel(0), 1
+; LE-NEXT:    li r4, 33
+; LE-NEXT:    stw r4, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: WriteGlobalVarInt:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valInt at got@pcrel(0), 1
+; BE-NEXT:    li r4, 33
+; BE-NEXT:    stw r4, 0(r3)
+; BE-NEXT:    blr
 entry:
   store i32 33, i32* @valInt, align 4
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalVarUnsigned() local_unnamed_addr  {
-; CHECK-LABEL: ReadGlobalVarUnsigned:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valUnsigned at got@pcrel(0), 1
-; CHECK-NEXT:    lwa r3, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: ReadGlobalVarUnsigned:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valUnsigned at got@pcrel(0), 1
+; LE-NEXT:    lwa r3, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: ReadGlobalVarUnsigned:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valUnsigned at got@pcrel(0), 1
+; BE-NEXT:    lwa r3, 0(r3)
+; BE-NEXT:    blr
 entry:
   %0 = load i32, i32* @valUnsigned, align 4
   ret i32 %0
 }
 
 define dso_local void @WriteGlobalVarUnsigned() local_unnamed_addr  {
-; CHECK-LABEL: WriteGlobalVarUnsigned:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valUnsigned at got@pcrel(0), 1
-; CHECK-NEXT:    li r4, 33
-; CHECK-NEXT:    stw r4, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: WriteGlobalVarUnsigned:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valUnsigned at got@pcrel(0), 1
+; LE-NEXT:    li r4, 33
+; LE-NEXT:    stw r4, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: WriteGlobalVarUnsigned:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valUnsigned at got@pcrel(0), 1
+; BE-NEXT:    li r4, 33
+; BE-NEXT:    stw r4, 0(r3)
+; BE-NEXT:    blr
 entry:
   store i32 33, i32* @valUnsigned, align 4
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalVarLong() local_unnamed_addr  {
-; CHECK-LABEL: ReadGlobalVarLong:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valLong at got@pcrel(0), 1
-; CHECK-NEXT:    lwa r3, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: ReadGlobalVarLong:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valLong at got@pcrel(0), 1
+; LE-NEXT:    lwa r3, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: ReadGlobalVarLong:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valLong at got@pcrel(0), 1
+; BE-NEXT:    lwa r3, 4(r3)
+; BE-NEXT:    blr
 entry:
   %0 = load i64, i64* @valLong, align 8
   %conv = trunc i64 %0 to i32
@@ -122,36 +184,57 @@ entry:
 }
 
 define dso_local void @WriteGlobalVarLong() local_unnamed_addr  {
-; CHECK-LABEL: WriteGlobalVarLong:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valLong at got@pcrel(0), 1
-; CHECK-NEXT:    li r4, 3333
-; CHECK-NEXT:    std r4, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: WriteGlobalVarLong:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valLong at got@pcrel(0), 1
+; LE-NEXT:    li r4, 3333
+; LE-NEXT:    std r4, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: WriteGlobalVarLong:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valLong at got@pcrel(0), 1
+; BE-NEXT:    li r4, 3333
+; BE-NEXT:    std r4, 0(r3)
+; BE-NEXT:    blr
 entry:
   store i64 3333, i64* @valLong, align 8
   ret void
 }
 
 define dso_local i32* @ReadGlobalPtr() local_unnamed_addr  {
-; CHECK-LABEL: ReadGlobalPtr:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, ptr at got@pcrel(0), 1
-; CHECK-NEXT:    ld r3, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: ReadGlobalPtr:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, ptr at got@pcrel(0), 1
+; LE-NEXT:    ld r3, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: ReadGlobalPtr:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, ptr at got@pcrel(0), 1
+; BE-NEXT:    ld r3, 0(r3)
+; BE-NEXT:    blr
 entry:
   %0 = load i32*, i32** @ptr, align 8
   ret i32* %0
 }
 
 define dso_local void @WriteGlobalPtr() local_unnamed_addr  {
-; CHECK-LABEL: WriteGlobalPtr:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, ptr at got@pcrel(0), 1
-; CHECK-NEXT:    li r4, 3
-; CHECK-NEXT:    ld r3, 0(r3)
-; CHECK-NEXT:    stw r4, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: WriteGlobalPtr:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, ptr at got@pcrel(0), 1
+; LE-NEXT:    li r4, 3
+; LE-NEXT:    ld r3, 0(r3)
+; LE-NEXT:    stw r4, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: WriteGlobalPtr:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, ptr at got@pcrel(0), 1
+; BE-NEXT:    li r4, 3
+; BE-NEXT:    ld r3, 0(r3)
+; BE-NEXT:    stw r4, 0(r3)
+; BE-NEXT:    blr
 entry:
   %0 = load i32*, i32** @ptr, align 8
   store i32 3, i32* %0, align 4
@@ -159,69 +242,109 @@ entry:
 }
 
 define dso_local nonnull i32* @GlobalVarAddr() local_unnamed_addr  {
-; CHECK-LABEL: GlobalVarAddr:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, valInt at got@pcrel(0), 1
-; CHECK-NEXT:    blr
+; LE-LABEL: GlobalVarAddr:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, valInt at got@pcrel(0), 1
+; LE-NEXT:    blr
+;
+; BE-LABEL: GlobalVarAddr:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, valInt at got@pcrel(0), 1
+; BE-NEXT:    blr
 entry:
   ret i32* @valInt
 }
 
 define dso_local signext i32 @ReadGlobalArray() local_unnamed_addr  {
-; CHECK-LABEL: ReadGlobalArray:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, array at got@pcrel(0), 1
-; CHECK-NEXT:    lwa r3, 12(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: ReadGlobalArray:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, array at got@pcrel(0), 1
+; LE-NEXT:    lwa r3, 12(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: ReadGlobalArray:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, array at got@pcrel(0), 1
+; BE-NEXT:    lwa r3, 12(r3)
+; BE-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array, i64 0, i64 3), align 4
   ret i32 %0
 }
 
 define dso_local void @WriteGlobalArray() local_unnamed_addr  {
-; CHECK-LABEL: WriteGlobalArray:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, array at got@pcrel(0), 1
-; CHECK-NEXT:    li r4, 5
-; CHECK-NEXT:    stw r4, 12(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: WriteGlobalArray:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, array at got@pcrel(0), 1
+; LE-NEXT:    li r4, 5
+; LE-NEXT:    stw r4, 12(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: WriteGlobalArray:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, array at got@pcrel(0), 1
+; BE-NEXT:    li r4, 5
+; BE-NEXT:    stw r4, 12(r3)
+; BE-NEXT:    blr
 entry:
   store i32 5, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array, i64 0, i64 3), align 4
   ret void
 }
 
 define dso_local signext i32 @ReadGlobalStruct() local_unnamed_addr  {
-; CHECK-LABEL: ReadGlobalStruct:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, structure at got@pcrel(0), 1
-; CHECK-NEXT:    lwa r3, 4(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: ReadGlobalStruct:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, structure at got@pcrel(0), 1
+; LE-NEXT:    lwa r3, 4(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: ReadGlobalStruct:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, structure at got@pcrel(0), 1
+; BE-NEXT:    lwa r3, 4(r3)
+; BE-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds (%struct.Struct, %struct.Struct* @structure, i64 0, i32 2), align 4
   ret i32 %0
 }
 
 define dso_local void @WriteGlobalStruct() local_unnamed_addr  {
-; CHECK-LABEL: WriteGlobalStruct:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, structure at got@pcrel(0), 1
-; CHECK-NEXT:    li r4, 3
-; CHECK-NEXT:    stw r4, 4(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: WriteGlobalStruct:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, structure at got@pcrel(0), 1
+; LE-NEXT:    li r4, 3
+; LE-NEXT:    stw r4, 4(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: WriteGlobalStruct:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, structure at got@pcrel(0), 1
+; BE-NEXT:    li r4, 3
+; BE-NEXT:    stw r4, 4(r3)
+; BE-NEXT:    blr
 entry:
   store i32 3, i32* getelementptr inbounds (%struct.Struct, %struct.Struct* @structure, i64 0, i32 2), align 4
   ret void
 }
 
 define dso_local void @ReadFuncPtr() local_unnamed_addr  {
-; CHECK-LABEL: ReadFuncPtr:
-; CHECK:         .localentry ReadFuncPtr, 1
-; CHECK-NEXT:  # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, ptrfunc at got@pcrel(0), 1
-; CHECK-NEXT:    ld r12, 0(r3)
-; CHECK-NEXT:    mtctr r12
-; CHECK-NEXT:    bctr
-; CHECK-NEXT:    #TC_RETURNr8 ctr 0
+; LE-LABEL: ReadFuncPtr:
+; LE:         .localentry ReadFuncPtr, 1
+; LE-NEXT:  # %bb.0: # %entry
+; LE-NEXT:    pld r3, ptrfunc at got@pcrel(0), 1
+; LE-NEXT:    ld r12, 0(r3)
+; LE-NEXT:    mtctr r12
+; LE-NEXT:    bctr
+; LE-NEXT:    #TC_RETURNr8 ctr 0
+;
+; BE-LABEL: ReadFuncPtr:
+; BE:         .localentry ReadFuncPtr, 1
+; BE-NEXT:  # %bb.0: # %entry
+; BE-NEXT:    pld r3, ptrfunc at got@pcrel(0), 1
+; BE-NEXT:    ld r12, 0(r3)
+; BE-NEXT:    mtctr r12
+; BE-NEXT:    bctr
+; BE-NEXT:    #TC_RETURNr8 ctr 0
 entry:
   %0 = load void ()*, void ()** bitcast (void (...)** @ptrfunc to void ()**), align 8
   tail call void %0()
@@ -229,12 +352,19 @@ entry:
 }
 
 define dso_local void @WriteFuncPtr() local_unnamed_addr  {
-; CHECK-LABEL: WriteFuncPtr:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pld r3, ptrfunc at got@pcrel(0), 1
-; CHECK-NEXT:    pld r4, function at got@pcrel(0), 1
-; CHECK-NEXT:    std r4, 0(r3)
-; CHECK-NEXT:    blr
+; LE-LABEL: WriteFuncPtr:
+; LE:       # %bb.0: # %entry
+; LE-NEXT:    pld r3, ptrfunc at got@pcrel(0), 1
+; LE-NEXT:    pld r4, function at got@pcrel(0), 1
+; LE-NEXT:    std r4, 0(r3)
+; LE-NEXT:    blr
+;
+; BE-LABEL: WriteFuncPtr:
+; BE:       # %bb.0: # %entry
+; BE-NEXT:    pld r3, ptrfunc at got@pcrel(0), 1
+; BE-NEXT:    pld r4, function at got@pcrel(0), 1
+; BE-NEXT:    std r4, 0(r3)
+; BE-NEXT:    blr
 entry:
   store void (...)* @function, void (...)** @ptrfunc, align 8
   ret void

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-indirect-call.ll b/llvm/test/CodeGen/PowerPC/pcrel-indirect-call.ll
index d7df6f10a6be..88f25db58b49 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-indirect-call.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-indirect-call.ll
@@ -1,5 +1,8 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
+
 
 ; The test checks the behavior of PC Relative indirect calls. When using
 ; PC Relative, TOC save and restore are no longer required. Function pointer

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll b/llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
index a7d3ca7e6d73..3a742588d23b 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
@@ -1,10 +1,18 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s \
 ; RUN:   --check-prefix=CHECK-R
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-use-absolute-jumptables \
+; RUN:   -mcpu=pwr10 -ppc-use-absolute-jumptables \
 ; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s \
-; RUN:   --check-prefix=CHECK-A
+; RUN:   --check-prefix=CHECK-A-LE
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN:   --check-prefix=CHECK-R
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-use-absolute-jumptables \
+; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN:   --check-prefix=CHECK-A-BE
+
 
 ; This test checks for getting relative and absolute jump table base address
 ; using PC Relative addressing.
@@ -18,13 +26,21 @@ define dso_local signext i32 @jumptable(i32 signext %param) {
 ; CHECK-R-NEXT:    add r4, r4, r5
 ; CHECK-R-NEXT:    mtctr r4
 ; CHECK-R-NEXT:    bctr
-; CHECK-A-LABEL: jumptable:
-; CHECK-A:       # %bb.1: # %entry
-; CHECK-A-NEXT:    rldic r4, r4
-; CHECK-A-NEXT:    paddi r5, 0, .LJTI0_0 at PCREL, 1
-; CHECK-A-NEXT:    ldx r4, r4, r5
-; CHECK-A-NEXT:    mtctr r4
-; CHECK-A-NEXT:    bctr
+; CHECK-A-LE-LABEL: jumptable:
+; CHECK-A-LE:       # %bb.1: # %entry
+; CHECK-A-LE-NEXT:    rldic r4, r4
+; CHECK-A-LE-NEXT:    paddi r5, 0, .LJTI0_0 at PCREL, 1
+; CHECK-A-LE-NEXT:    ldx r4, r4, r5
+; CHECK-A-LE-NEXT:    mtctr r4
+; CHECK-A-LE-NEXT:    bctr
+; CHECK-A-BE-LABEL: jumptable:
+; CHECK-A-BE:       # %bb.1: # %entry
+; CHECK-A-BE-NEXT:    rldic r4, r4
+; CHECK-A-BE-NEXT:    paddi r5, 0, .LJTI0_0 at PCREL, 1
+; CHECK-A-BE-NEXT:    lwax r4, r4, r5
+; CHECK-A-BE-NEXT:    mtctr r4
+; CHECK-A-BE-NEXT:    bctr
+
 
 entry:
   switch i32 %param, label %sw.default [

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll b/llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll
index 373b339d45e1..5c2eb0d5ec46 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll
@@ -1,10 +1,18 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
 ; RUN:   FileCheck %s --check-prefix=CHECK-S
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
 ; RUN:   --filetype=obj < %s | \
-; RUN:   llvm-objdump --mcpu=future -dr - | FileCheck %s --check-prefix=CHECK-O
+; RUN:   llvm-objdump --mcpu=pwr10 -dr - | FileCheck %s --check-prefix=CHECK-O
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   FileCheck %s --check-prefix=CHECK-S
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
+; RUN:   --filetype=obj < %s | \
+; RUN:   llvm-objdump --mcpu=pwr10 -dr - | FileCheck %s --check-prefix=CHECK-O
+
 
 
 @array1 = external local_unnamed_addr global [10 x i32], align 4
@@ -16,9 +24,9 @@ define dso_local signext i32 @getElementLocal7() local_unnamed_addr {
 ; CHECK-S-NEXT:    plwa r3, array2 at PCREL+28(0), 1
 ; CHECK-S-NEXT:    blr
 ; CHECK-O-LABEL: <getElementLocal7>:
-; CHECK-O:         00 00 10 04 00 00 60 a4       plwa 3, 0(0), 1
-; CHECK-O-NEXT:    0000000000000000:  R_PPC64_PCREL34      array2+0x1c
-; CHECK-O-NEXT:    20 00 80 4e                   blr
+; CHECK-O:         plwa 3, 0(0), 1
+; CHECK-O-NEXT:      R_PPC64_PCREL34      array2+0x1c
+; CHECK-O-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array2, i64 0, i64 7), align 4
   ret i32 %0
@@ -30,9 +38,9 @@ define dso_local signext i32 @getElementLocalNegative() local_unnamed_addr {
 ; CHECK-S-NEXT:    plwa r3, array2 at PCREL-8(0), 1
 ; CHECK-S-NEXT:    blr
 ; CHECK-O-LABEL: <getElementLocalNegative>:
-; CHECK-O:         00 00 10 04 00 00 60 a4       plwa 3, 0(0), 1
-; CHECK-O-NEXT:    0000000000000020:  R_PPC64_PCREL34      array2-0x8
-; CHECK-O-NEXT:    20 00 80 4e                   blr
+; CHECK-O:         plwa 3, 0(0), 1
+; CHECK-O-NEXT:      R_PPC64_PCREL34      array2-0x8
+; CHECK-O-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array2, i64 0, i64 -2), align 4
   ret i32 %0
@@ -45,10 +53,10 @@ define dso_local signext i32 @getElementExtern4() local_unnamed_addr {
 ; CHECK-S-NEXT:    lwa r3, 16(r3)
 ; CHECK-S-NEXT:    blr
 ; CHECK-O-LABEL: <getElementExtern4>:
-; CHECK-O:         00 00 10 04 00 00 60 e4       pld 3, 0(0), 1
-; CHECK-O-NEXT:    0000000000000040:  R_PPC64_GOT_PCREL34  array1
-; CHECK-O-NEXT:    12 00 63 e8                   lwa 3, 16(3)
-; CHECK-O-NEXT:    20 00 80 4e                   blr
+; CHECK-O:         pld 3, 0(0), 1
+; CHECK-O-NEXT:      R_PPC64_GOT_PCREL34  array1
+; CHECK-O-NEXT:    lwa 3, 16(3)
+; CHECK-O-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array1, i64 0, i64 4), align 4
   ret i32 %0
@@ -61,10 +69,10 @@ define dso_local signext i32 @getElementExternNegative() local_unnamed_addr {
 ; CHECK-S-NEXT:    lwa r3, -4(r3)
 ; CHECK-S-NEXT:    blr
 ; CHECK-O-LABEL: <getElementExternNegative>:
-; CHECK-O:         00 00 10 04 00 00 60 e4       pld 3, 0(0), 1
-; CHECK-O-NEXT:    0000000000000060:  R_PPC64_GOT_PCREL34  array1
-; CHECK-O-NEXT:    fe ff 63 e8                   lwa 3, -4(3)
-; CHECK-O-NEXT:    20 00 80 4e                   blr
+; CHECK-O:         pld 3, 0(0), 1
+; CHECK-O-NEXT:      R_PPC64_GOT_PCREL34  array1
+; CHECK-O-NEXT:    lwa 3, -4(3)
+; CHECK-O-NEXT:    blr
 entry:
   %0 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @array1, i64 0, i64 -1), align 4
   ret i32 %0

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll b/llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll
index 78b01601f1fa..51eb7a3fbbaa 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll
@@ -1,7 +1,11 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
 ; RUN:   FileCheck %s
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   FileCheck %s
+
 
 ; The tests check the behaviour of PC Relative tail calls. When using
 ; PC Relative we are able to do more tail calling than we have done in

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel.ll b/llvm/test/CodeGen/PowerPC/pcrel.ll
index 539c6a909637..e9ebc6b2dd23 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel.ll
@@ -1,10 +1,10 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
 ; RUN:   FileCheck %s --check-prefix=CHECK-S
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:   -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
+; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
+; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
 ; RUN:   --filetype=obj < %s | \
-; RUN:   llvm-objdump --mcpu=future -dr - | FileCheck %s --check-prefix=CHECK-O
+; RUN:   llvm-objdump --mcpu=pwr10 -dr - | FileCheck %s --check-prefix=CHECK-O
 
 ; Constant Pool Index.
 ; CHECK-S-LABEL: ConstPool


        


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