[PATCH] D84169: [Thumb] set code alignment for 16-bit load from constant pool

[Simon Wallis via Phabricator via llvm-commits]

simonwallis2 created this revision.
simonwallis2 added a reviewer: dnsampaio.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

[Thumb] set code alignment for 16-bit load from constant pool

LLVM miscompiles this code when compiling for a target with v8.2-A FP16 and the Thumb ISA at -O0:

extern void bar(__fp16 P5 <https://reviews.llvm.org/P5>);

int main() {

  __fp16 P5 = 1.96875;
  bar(P5);

}

The code section containing main has 2 byte alignment.
It needs to have 4 byte alignment,
because the load literal instruction has an offset from the
load address with the low 2 bits zeroed.

I do not include a test case in this check-in.
llc and llvm-mc do not exhibit this bug. They do not set code section alignment
in the same manner as clang.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84169

Files:
  llvm/lib/Target/ARM/ARMConstantIslandPass.cpp


Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -491,7 +491,11 @@
 
   // The function needs to be as aligned as the basic blocks. The linker may
   // move functions around based on their alignment.
-  MF->ensureAlignment(BB->getAlignment());
+  // Special case: halfword literals still need word alignment on the function.
+  Align FuncAlign = MaxAlign;
+  if (MaxAlign == 2)
+    FuncAlign = Align(4);
+  MF->ensureAlignment(FuncAlign);
 
   // Order the entries in BB by descending alignment.  That ensures correct
   // alignment of all entries as long as BB is sufficiently aligned.  Keep


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