[llvm] d12ec0f - [InstCombine] Fix store merge worklist management (PR46680)
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 19 06:38:53 PDT 2020
Thank you!
On Sun, Jul 19, 2020 at 4:09 PM Nikita Popov via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
>
> Author: Nikita Popov
> Date: 2020-07-19T15:05:45+02:00
> New Revision: d12ec0f752e7f2c7f7252539da2d124264ec33f7
>
> URL: https://github.com/llvm/llvm-project/commit/d12ec0f752e7f2c7f7252539da2d124264ec33f7
> DIFF: https://github.com/llvm/llvm-project/commit/d12ec0f752e7f2c7f7252539da2d124264ec33f7.diff
>
> LOG: [InstCombine] Fix store merge worklist management (PR46680)
>
> Fixes https://bugs.llvm.org/show_bug.cgi?id=46680.
>
> Just like insertions through IRBuilder, InsertNewInstBefore()
> should be using the deferred worklist mechanism, so that processing
> of newly added instructions is prioritized.
>
> There's one side-effect of the worklist order change which could be
> classified as a regression. An add op gets pushed through a select
> that at the time is not a umax. We could add a reverse transform
> that tries to push adds in the reverse direction to restore a min/max,
> but that seems like a sure way of getting infinite loops... Seems
> like something that should best wait on min/max intrinsics.
>
> Differential Revision: https://reviews.llvm.org/D84109
>
> Added:
>
>
> Modified:
> llvm/lib/Transforms/InstCombine/InstCombineInternal.h
> llvm/test/Transforms/InstCombine/minmax-fold.ll
> llvm/test/Transforms/InstCombine/pr46680.ll
>
> Removed:
>
>
>
> ################################################################################
> diff --git a/llvm/lib/Transforms/InstCombine/InstCombineInternal.h b/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
> index f918dc7198ca..ca51f37af4d9 100644
> --- a/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
> +++ b/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
> @@ -653,7 +653,7 @@ class LLVM_LIBRARY_VISIBILITY InstCombiner
> "New instruction already inserted into a basic block!");
> BasicBlock *BB = Old.getParent();
> BB->getInstList().insert(Old.getIterator(), New); // Insert inst
> - Worklist.push(New);
> + Worklist.add(New);
> return New;
> }
>
>
> diff --git a/llvm/test/Transforms/InstCombine/minmax-fold.ll b/llvm/test/Transforms/InstCombine/minmax-fold.ll
> index 5ee38978ed78..dcf060c09613 100644
> --- a/llvm/test/Transforms/InstCombine/minmax-fold.ll
> +++ b/llvm/test/Transforms/InstCombine/minmax-fold.ll
> @@ -953,8 +953,8 @@ define i32 @add_umin(i32 %x) {
>
> define i32 @add_umin_constant_limit(i32 %x) {
> ; CHECK-LABEL: @add_umin_constant_limit(
> -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[X:%.*]], 0
> -; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i32 41, i32 42
> +; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[X:%.*]], 0
> +; CHECK-NEXT: [[R:%.*]] = select i1 [[DOTNOT]], i32 41, i32 42
> ; CHECK-NEXT: ret i32 [[R]]
> ;
> %a = add nuw i32 %x, 41
> @@ -1165,8 +1165,8 @@ define <2 x i33> @add_umax_vec(<2 x i33> %x) {
>
> define i8 @PR14613_umin(i8 %x) {
> ; CHECK-LABEL: @PR14613_umin(
> -; CHECK-NEXT: [[U7:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[X:%.*]], i8 15)
> -; CHECK-NEXT: ret i8 [[U7]]
> +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[X:%.*]], i8 15)
> +; CHECK-NEXT: ret i8 [[TMP1]]
> ;
> %u4 = zext i8 %x to i32
> %u5 = add nuw nsw i32 %u4, 15
> @@ -1179,8 +1179,8 @@ define i8 @PR14613_umin(i8 %x) {
> define i8 @PR14613_umax(i8 %x) {
> ; CHECK-LABEL: @PR14613_umax(
> ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], -16
> -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 -16
> -; CHECK-NEXT: [[U7:%.*]] = add nsw i8 [[TMP2]], 15
> +; CHECK-NEXT: [[X_OP:%.*]] = add i8 [[X]], 15
> +; CHECK-NEXT: [[U7:%.*]] = select i1 [[TMP1]], i8 [[X_OP]], i8 -1
> ; CHECK-NEXT: ret i8 [[U7]]
> ;
> %u4 = zext i8 %x to i32
> @@ -1422,8 +1422,8 @@ define <2 x i33> @add_smax_vec(<2 x i33> %x) {
> define i8 @PR14613_smin(i8 %x) {
> ; CHECK-LABEL: @PR14613_smin(
> ; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 40
> -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 40
> -; CHECK-NEXT: [[U7:%.*]] = add nsw i8 [[TMP2]], 15
> +; CHECK-NEXT: [[X_OP:%.*]] = add i8 [[X]], 15
> +; CHECK-NEXT: [[U7:%.*]] = select i1 [[TMP1]], i8 [[X_OP]], i8 55
> ; CHECK-NEXT: ret i8 [[U7]]
> ;
> %u4 = sext i8 %x to i32
> @@ -1437,8 +1437,8 @@ define i8 @PR14613_smin(i8 %x) {
> define i8 @PR14613_smax(i8 %x) {
> ; CHECK-LABEL: @PR14613_smax(
> ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8 [[X:%.*]], 40
> -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 40
> -; CHECK-NEXT: [[U7:%.*]] = add nuw i8 [[TMP2]], 15
> +; CHECK-NEXT: [[X_OP:%.*]] = add i8 [[X]], 15
> +; CHECK-NEXT: [[U7:%.*]] = select i1 [[TMP1]], i8 [[X_OP]], i8 55
> ; CHECK-NEXT: ret i8 [[U7]]
> ;
> %u4 = sext i8 %x to i32
>
> diff --git a/llvm/test/Transforms/InstCombine/pr46680.ll b/llvm/test/Transforms/InstCombine/pr46680.ll
> index 90ea2e110afe..59d449d5dc23 100644
> --- a/llvm/test/Transforms/InstCombine/pr46680.ll
> +++ b/llvm/test/Transforms/InstCombine/pr46680.ll
> @@ -1,5 +1,5 @@
> ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
> -; RUN: opt -S -instcombine -instcombine-infinite-loop-threshold=3 < %s | FileCheck %s
> +; RUN: opt -S -instcombine -instcombine-infinite-loop-threshold=2 < %s | FileCheck %s
>
> target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
> target triple = "x86_64-pc-linux-gnu"
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list