[PATCH] D83216: [Intrinsic] Add sshl.sat/ushl.sat, saturated shift intrinsics.

[Bevin Hansson via Phabricator via llvm-commits]

ebevhan updated this revision to Diff 278494.
ebevhan added a comment.
Herald added subscribers: kerbowa, nhaehnle, jvesely.

Added GlobalISel opcodes. I'm not that familiar with GISEL, though, so I've probably not done it completely right.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83216/new/

https://reviews.llvm.org/D83216

Files:
  llvm/docs/GlobalISel/GenericOpcode.rst
  llvm/docs/LangRef.rst
  llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/include/llvm/IR/Intrinsics.td
  llvm/include/llvm/Support/TargetOpcodes.def
  llvm/include/llvm/Target/GenericOpcodes.td
  llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
  llvm/include/llvm/Target/TargetSelectionDAG.td
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/IR/Verifier.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
  llvm/test/CodeGen/X86/sshl_sat.ll
  llvm/test/CodeGen/X86/ushl_sat.ll

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