[PATCH] D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs.

Denis Antrushin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 16 04:45:42 PDT 2020


dantrushin updated this revision to Diff 278433.
dantrushin added a comment.

Rework slot reservation according to comments.
Add an option to disable copy propagation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81647/new/

https://reviews.llvm.org/D81647

Files:
  llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
  llvm/test/CodeGen/X86/statepoint-fixup-call.mir
  llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir
  llvm/test/CodeGen/X86/statepoint-fixup-shared-ehpad.mir
  llvm/test/CodeGen/X86/statepoint-vreg.mir

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