[PATCH] D83602: [DAGCombiner] Scalarize splats with just one demanded lane

[Thomas Lively via Phabricator via llvm-commits]

tlively added a comment.

In D83602#2145785 <https://reviews.llvm.org/D83602#2145785>, @lebedev.ri wrote:

> Is this supposed to fix some lowering-produced code?
>  If not, shouldn't this be best done in the middle-end?


Yes, this fixes lowering-produced code. In particular, WebAssembly's vector shift instructions take a scalar shift amount, but in LLVM IR vector shifts take vector shift amounts. WebAssembly's lowering then needs to scalarize the shift entirely except when the shift amount is a splat value, in which case it can just take one lane as the scalar shift amount. This sequence of patches improves codegen in that case.


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