[PATCH] D83523: MachineSink: permit sinking into INLINEASM_BR indirect targets

Nick Desaulniers via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 9 17:15:23 PDT 2020


nickdesaulniers created this revision.
nickdesaulniers added reviewers: jyknight, void.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

Fixes a kernel panic for 4.4 LTS x86_64 Linux kernels.

Fixes: D79794 <https://reviews.llvm.org/D79794>
Link: https://github.com/ClangBuiltLinux/linux/issues/1085
Signed-off-by: Nick Desaulniers <ndesaulniers at google.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D83523

Files:
  llvm/lib/CodeGen/MachineSink.cpp
  llvm/test/CodeGen/X86/machine-sink-inlineasm-br.ll


Index: llvm/test/CodeGen/X86/machine-sink-inlineasm-br.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/machine-sink-inlineasm-br.ll
@@ -0,0 +1,28 @@
+; RUN: llc -O2 $1 -print-after=machine-sink -stop-after=machine-sink -o /dev/null 2>&1 %s | FileCheck %s
+%struct1 = type { i8*, %struct2, %struct3 }
+%struct2 = type { %struct2*, %struct2* }
+%struct3 = type { %struct4 }
+%struct4 = type { i32 }
+%struct5 = type { %struct6, %struct2, void (%struct1*)*, void (%struct1*)* }
+%struct6 = type { i32 }
+
+define i32 @klist_dec_and_del(%struct1* %0) {
+  %2 = getelementptr inbounds %struct1, %struct1* %0, i64 0, i32 2
+  %3 = getelementptr inbounds %struct3, %struct3* %2, i64 0, i32 0, i32 0
+; CHECK-NOT: %0:gr64 = nuw ADD64ri8 %1:gr64(tied-def 0), 24, implicit-def dead $eflags
+; CHECK: INLINEASM_BR &"" [sideeffect] [mayload] [maystore] [attdialect], $0:[mem:m], %1:gr64, 1, $noreg, 24, $noreg, $1:[imm], 1, $2:[imm], blockaddress(@klist_dec_and_del, %ir-block.4), $3:[clobber], implicit-def early-clobber $df, $4:[clobber], implicit-def early-clobber $fpsw, $5:[clobber], implicit-def early-clobber $eflags
+  callbr void asm sideeffect "", "*m,er,X,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %3, i32 1, i8* blockaddress(@klist_dec_and_del, %4))
+          to label %8 [label %4]
+
+4:                                                ; preds = %1
+  %5 = getelementptr %struct3, %struct3* %2, i64 -6
+  br label %6
+
+6:                                                ; preds = %4
+  %7 = bitcast %struct3* %5 to %struct5**
+  store %struct5* null, %struct5** %7, align 8
+  br label %8
+
+8:                                                ; preds = %6, %1
+  ret i32 undef
+}
Index: llvm/lib/CodeGen/MachineSink.cpp
===================================================================
--- llvm/lib/CodeGen/MachineSink.cpp
+++ llvm/lib/CodeGen/MachineSink.cpp
@@ -733,13 +733,6 @@
   if (SuccToSinkTo && SuccToSinkTo->isEHPad())
     return nullptr;
 
-  // It ought to be okay to sink instructions into an INLINEASM_BR target, but
-  // only if we make sure that MI occurs _before_ an INLINEASM_BR instruction in
-  // the source block (which this code does not yet do). So for now, forbid
-  // doing so.
-  if (SuccToSinkTo && SuccToSinkTo->isInlineAsmBrIndirectTarget())
-    return nullptr;
-
   return SuccToSinkTo;
 }
 


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