[PATCH] D83444: [AArch64][SVE] Add lowering for llvm.fma.

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 9 06:39:43 PDT 2020


paulwalker-arm accepted this revision.
paulwalker-arm added inline comments.
This revision is now accepted and ready to land.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:405-410
+  def : Pat<(nxv8f16 (AArch64fma_p nxv8i1:$P, nxv8f16:$Op1, nxv8f16:$Op2, nxv8f16:$Op3)),
+            (FMLA_ZPmZZ_H $P, $Op3, $Op1, $Op2)>;
+  def : Pat<(nxv4f32 (AArch64fma_p nxv4i1:$P, nxv4f32:$Op1, nxv4f32:$Op2, nxv4f32:$Op3)),
+            (FMLA_ZPmZZ_S $P, $Op3, $Op1, $Op2)>;
+  def : Pat<(nxv2f64 (AArch64fma_p nxv2i1:$P, nxv2f64:$Op1, nxv2f64:$Op2, nxv2f64:$Op3)),
+            (FMLA_ZPmZZ_D $P, $Op3, $Op1, $Op2)>;
----------------
I was going to say you're missing patterns for the other legal scalable vector types, but I can see that's a common theme across the floating point instructions so I'm happy enough.


================
Comment at: llvm/test/CodeGen/AArch64/sve-fp.ll:138
+
+declare <vscale x 2 x double> @llvm.fma.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)
+declare <vscale x 4 x float> @llvm.fma.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)
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To be consistent these belong at the bottom of the file with the others.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D83444/new/

https://reviews.llvm.org/D83444





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