[llvm] a48cf72 - [InstSimplify] Handle not inserted instruction gracefully (PR46638)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2020-07-08T21:43:32+02:00
New Revision: a48cf72238e740adb2a45012736c0c655070fb8f

URL: https://github.com/llvm/llvm-project/commit/a48cf72238e740adb2a45012736c0c655070fb8f
DIFF: https://github.com/llvm/llvm-project/commit/a48cf72238e740adb2a45012736c0c655070fb8f.diff

LOG: [InstSimplify] Handle not inserted instruction gracefully (PR46638)

When simplifying comparisons using a dominating assume, bail out
if the context instruction is not inserted.

Added: 
    llvm/test/Transforms/SimplifyCFG/pr46638.ll

Modified: 
    llvm/lib/Analysis/InstructionSimplify.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index df4abe09797c..d3bdf9d6aafd 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -3284,7 +3284,8 @@ static Value *simplifyICmpWithMinMax(CmpInst::Predicate Pred, Value *LHS,
 static Value *simplifyICmpWithDominatingAssume(CmpInst::Predicate Predicate,
                                                Value *LHS, Value *RHS,
                                                const SimplifyQuery &Q) {
-  if (!Q.AC || !Q.CxtI)
+  // Gracefully handle instructions that have not been inserted yet.
+  if (!Q.AC || !Q.CxtI || !Q.CxtI->getParent())
     return nullptr;
 
   for (Value *AssumeBaseOp : {LHS, RHS}) {

diff  --git a/llvm/test/Transforms/SimplifyCFG/pr46638.ll b/llvm/test/Transforms/SimplifyCFG/pr46638.ll
new file mode 100644
index 000000000000..ba7ce88cf6ad
--- /dev/null
+++ b/llvm/test/Transforms/SimplifyCFG/pr46638.ll
@@ -0,0 +1,45 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -simplifycfg < %s | FileCheck %s
+
+define void @pr46638(i1 %c, i32 %x) {
+; CHECK-LABEL: @pr46638(
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP1]])
+; CHECK-NEXT:    br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
+; CHECK:       false1:
+; CHECK-NEXT:    call void @dummy(i32 1)
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[X]], 0
+; CHECK-NEXT:    [[EXT:%.*]] = zext i1 [[CMP2]] to i32
+; CHECK-NEXT:    call void @dummy(i32 [[EXT]])
+; CHECK-NEXT:    ret void
+; CHECK:       true2.critedge:
+; CHECK-NEXT:    [[CMP2_C:%.*]] = icmp sgt i32 [[X]], 0
+; CHECK-NEXT:    [[EXT_C:%.*]] = zext i1 [[CMP2_C]] to i32
+; CHECK-NEXT:    call void @dummy(i32 [[EXT_C]])
+; CHECK-NEXT:    call void @dummy(i32 2)
+; CHECK-NEXT:    ret void
+;
+  %cmp1 = icmp slt i32 %x, 0
+  call void @llvm.assume(i1 %cmp1)
+  br i1 %c, label %true1, label %false1
+
+true1:
+  %cmp2 = icmp sgt i32 %x, 0
+  %ext = zext i1 %cmp2 to i32
+  call void @dummy(i32 %ext)
+  br i1 %c, label %true2, label %false2
+
+false1:
+  call void @dummy(i32 1)
+  br label %true1
+
+true2:
+  call void @dummy(i32 2)
+  ret void
+
+false2:
+  ret void
+}
+
+declare void @dummy(i32)
+declare void @llvm.assume(i1)