[PATCH] D83137: [SVE][CodeGen] Legalisation of masked loads and stores

[Kerry McLaughlin via Phabricator via llvm-commits]

kmclaughlin created this revision.
kmclaughlin added reviewers: sdesmalen, efriedma, david-arm.
Herald added subscribers: llvm-commits, psnobl, hiraditya, tschuett.
Herald added a project: LLVM.

This patch modifies IncrementMemoryAddress to use a vscale
when calculating the new address if the data type is scalable.

Also adds tablegen patterns which match an extract_subvector
of a legal predicate type with zip1/zip2 instructions


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D83137

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/sve-split-load.ll
  llvm/test/CodeGen/AArch64/sve-split-store.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D83137.275424.patch
Type: text/x-patch
Size: 11285 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200703/43f85bd2/attachment.bin>