[PATCH] D82669: [ARM] Generate URHADD from (b - (~a)) >> 1

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:8806
+  SDValue Shift = Op.getOperand(0);
+  if (Shift.getOpcode() != AArch64ISD::VLSHR)
+    return Op;
----------------
This is always a VLSHR, as opposed to a VASHR because the type is large enough that the signed shift bits are never demanded? If so can you add a comment about that.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82669/new/

https://reviews.llvm.org/D82669