[PATCH] D82893: [AArch64][SVE] Add reg+imm addressing mode for unpredicated loads

Kerry McLaughlin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 1 03:12:19 PDT 2020


This revision was automatically updated to reflect the committed changes.
Closed by commit rG4c6683eafc17: [AArch64][SVE] Add reg+imm addressing mode for unpredicated loads (authored by kmclaughlin).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82893/new/

https://reviews.llvm.org/D82893

Files:
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D82893.274734.patch
Type: text/x-patch
Size: 4853 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200701/2c77f543/attachment.bin>


More information about the llvm-commits mailing list