[llvm] 1bcdea5 - [X86] Add common prefixes to merge more hadd/sub tests checks
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 29 14:11:37 PDT 2020
Author: Simon Pilgrim
Date: 2020-06-29T22:11:20+01:00
New Revision: 1bcdea5c36c296dcbf1fc244e14b3b21ca7934d0
URL: https://github.com/llvm/llvm-project/commit/1bcdea5c36c296dcbf1fc244e14b3b21ca7934d0
DIFF: https://github.com/llvm/llvm-project/commit/1bcdea5c36c296dcbf1fc244e14b3b21ca7934d0.diff
LOG: [X86] Add common prefixes to merge more hadd/sub tests checks
Added:
Modified:
llvm/test/CodeGen/X86/avx2-phaddsub.ll
llvm/test/CodeGen/X86/avx512-hadd-hsub.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/avx2-phaddsub.ll b/llvm/test/CodeGen/X86/avx2-phaddsub.ll
index 23e2fd69cf07..cbe98904c17f 100644
--- a/llvm/test/CodeGen/X86/avx2-phaddsub.ll
+++ b/llvm/test/CodeGen/X86/avx2-phaddsub.ll
@@ -1,19 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx2 | FileCheck %s --check-prefixes=X32,X32-SLOW
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx2,fast-hops | FileCheck %s --check-prefixes=X32,X32-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=X64,X64-SLOW
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,fast-hops | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc < %s -mtriple=i686-- -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,SLOW,X86-SLOW
+; RUN: llc < %s -mtriple=i686-- -mattr=+avx2,fast-hops | FileCheck %s --check-prefixes=CHECK,X86,FAST,X86-FAST
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,SLOW,X64-SLOW
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,fast-hops | FileCheck %s --check-prefixes=CHECK,X64,FAST,X64-FAST
define <16 x i16> @phaddw1(<16 x i16> %x, <16 x i16> %y) {
-; X32-LABEL: phaddw1:
-; X32: # %bb.0:
-; X32-NEXT: vphaddw %ymm1, %ymm0, %ymm0
-; X32-NEXT: retl
-;
-; X64-LABEL: phaddw1:
-; X64: # %bb.0:
-; X64-NEXT: vphaddw %ymm1, %ymm0, %ymm0
-; X64-NEXT: retq
+; CHECK-LABEL: phaddw1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphaddw %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: ret{{[l|q]}}
%a = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30>
%b = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31>
%r = add <16 x i16> %a, %b
@@ -21,15 +16,10 @@ define <16 x i16> @phaddw1(<16 x i16> %x, <16 x i16> %y) {
}
define <16 x i16> @phaddw2(<16 x i16> %x, <16 x i16> %y) {
-; X32-LABEL: phaddw2:
-; X32: # %bb.0:
-; X32-NEXT: vphaddw %ymm1, %ymm0, %ymm0
-; X32-NEXT: retl
-;
-; X64-LABEL: phaddw2:
-; X64: # %bb.0:
-; X64-NEXT: vphaddw %ymm1, %ymm0, %ymm0
-; X64-NEXT: retq
+; CHECK-LABEL: phaddw2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphaddw %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: ret{{[l|q]}}
%a = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31>
%b = shufflevector <16 x i16> %y, <16 x i16> %x, <16 x i32> <i32 16, i32 18, i32 20, i32 22, i32 0, i32 2, i32 4, i32 6, i32 24, i32 26, i32 28, i32 30, i32 8, i32 10, i32 12, i32 14>
%r = add <16 x i16> %a, %b
@@ -37,15 +27,10 @@ define <16 x i16> @phaddw2(<16 x i16> %x, <16 x i16> %y) {
}
define <8 x i32> @phaddd1(<8 x i32> %x, <8 x i32> %y) {
-; X32-LABEL: phaddd1:
-; X32: # %bb.0:
-; X32-NEXT: vphaddd %ymm1, %ymm0, %ymm0
-; X32-NEXT: retl
-;
-; X64-LABEL: phaddd1:
-; X64: # %bb.0:
-; X64-NEXT: vphaddd %ymm1, %ymm0, %ymm0
-; X64-NEXT: retq
+; CHECK-LABEL: phaddd1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: ret{{[l|q]}}
%a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14>
%b = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15>
%r = add <8 x i32> %a, %b
@@ -53,15 +38,10 @@ define <8 x i32> @phaddd1(<8 x i32> %x, <8 x i32> %y) {
}
define <8 x i32> @phaddd2(<8 x i32> %x, <8 x i32> %y) {
-; X32-LABEL: phaddd2:
-; X32: # %bb.0:
-; X32-NEXT: vphaddd %ymm1, %ymm0, %ymm0
-; X32-NEXT: retl
-;
-; X64-LABEL: phaddd2:
-; X64: # %bb.0:
-; X64-NEXT: vphaddd %ymm1, %ymm0, %ymm0
-; X64-NEXT: retq
+; CHECK-LABEL: phaddd2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: ret{{[l|q]}}
%a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 1, i32 2, i32 9, i32 10, i32 5, i32 6, i32 13, i32 14>
%b = shufflevector <8 x i32> %y, <8 x i32> %x, <8 x i32> <i32 8, i32 11, i32 0, i32 3, i32 12, i32 15, i32 4, i32 7>
%r = add <8 x i32> %a, %b
@@ -69,15 +49,10 @@ define <8 x i32> @phaddd2(<8 x i32> %x, <8 x i32> %y) {
}
define <8 x i32> @phaddd3(<8 x i32> %x) {
-; X32-LABEL: phaddd3:
-; X32: # %bb.0:
-; X32-NEXT: vphaddd %ymm0, %ymm0, %ymm0
-; X32-NEXT: retl
-;
-; X64-LABEL: phaddd3:
-; X64: # %bb.0:
-; X64-NEXT: vphaddd %ymm0, %ymm0, %ymm0
-; X64-NEXT: retq
+; CHECK-LABEL: phaddd3:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphaddd %ymm0, %ymm0, %ymm0
+; CHECK-NEXT: ret{{[l|q]}}
%a = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32 undef, i32 2, i32 8, i32 10, i32 4, i32 6, i32 undef, i32 14>
%b = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32 1, i32 3, i32 9, i32 undef, i32 5, i32 7, i32 13, i32 15>
%r = add <8 x i32> %a, %b
@@ -85,15 +60,10 @@ define <8 x i32> @phaddd3(<8 x i32> %x) {
}
define <16 x i16> @phsubw1(<16 x i16> %x, <16 x i16> %y) {
-; X32-LABEL: phsubw1:
-; X32: # %bb.0:
-; X32-NEXT: vphsubw %ymm1, %ymm0, %ymm0
-; X32-NEXT: retl
-;
-; X64-LABEL: phsubw1:
-; X64: # %bb.0:
-; X64-NEXT: vphsubw %ymm1, %ymm0, %ymm0
-; X64-NEXT: retq
+; CHECK-LABEL: phsubw1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphsubw %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: ret{{[l|q]}}
%a = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30>
%b = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31>
%r = sub <16 x i16> %a, %b
@@ -101,15 +71,10 @@ define <16 x i16> @phsubw1(<16 x i16> %x, <16 x i16> %y) {
}
define <8 x i32> @phsubd1(<8 x i32> %x, <8 x i32> %y) {
-; X32-LABEL: phsubd1:
-; X32: # %bb.0:
-; X32-NEXT: vphsubd %ymm1, %ymm0, %ymm0
-; X32-NEXT: retl
-;
-; X64-LABEL: phsubd1:
-; X64: # %bb.0:
-; X64-NEXT: vphsubd %ymm1, %ymm0, %ymm0
-; X64-NEXT: retq
+; CHECK-LABEL: phsubd1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphsubd %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: ret{{[l|q]}}
%a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14>
%b = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 1, i32 3, i32 9, i32 11, i32 5, i32 7, i32 13, i32 15>
%r = sub <8 x i32> %a, %b
@@ -117,15 +82,10 @@ define <8 x i32> @phsubd1(<8 x i32> %x, <8 x i32> %y) {
}
define <8 x i32> @phsubd2(<8 x i32> %x, <8 x i32> %y) {
-; X32-LABEL: phsubd2:
-; X32: # %bb.0:
-; X32-NEXT: vphsubd %ymm1, %ymm0, %ymm0
-; X32-NEXT: retl
-;
-; X64-LABEL: phsubd2:
-; X64: # %bb.0:
-; X64-NEXT: vphsubd %ymm1, %ymm0, %ymm0
-; X64-NEXT: retq
+; CHECK-LABEL: phsubd2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphsubd %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: ret{{[l|q]}}
%a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 undef, i32 8, i32 undef, i32 4, i32 6, i32 12, i32 14>
%b = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 1, i32 undef, i32 9, i32 11, i32 5, i32 7, i32 undef, i32 15>
%r = sub <8 x i32> %a, %b
diff --git a/llvm/test/CodeGen/X86/avx512-hadd-hsub.ll b/llvm/test/CodeGen/X86/avx512-hadd-hsub.ll
index 283f950b28be..1fd3e15c3e01 100644
--- a/llvm/test/CodeGen/X86/avx512-hadd-hsub.ll
+++ b/llvm/test/CodeGen/X86/avx512-hadd-hsub.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-;RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=KNL
-;RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=SKX
+;RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=CHECK,KNL
+;RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=CHECK,SKX
define i32 @hadd_16(<16 x i32> %x225) {
; KNL-LABEL: hadd_16:
@@ -107,15 +107,10 @@ define float @fhsub_16(<16 x float> %x225) {
}
define <16 x i32> @hadd_16_3(<16 x i32> %x225, <16 x i32> %x227) {
-; KNL-LABEL: hadd_16_3:
-; KNL: # %bb.0:
-; KNL-NEXT: vphaddd %ymm1, %ymm0, %ymm0
-; KNL-NEXT: retq
-;
-; SKX-LABEL: hadd_16_3:
-; SKX: # %bb.0:
-; SKX-NEXT: vphaddd %ymm1, %ymm0, %ymm0
-; SKX-NEXT: retq
+; CHECK-LABEL: hadd_16_3:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: retq
%x226 = shufflevector <16 x i32> %x225, <16 x i32> %x227, <16 x i32> <i32 0, i32 2, i32 16, i32 18
, i32 4, i32 6, i32 20, i32 22, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%x228 = shufflevector <16 x i32> %x225, <16 x i32> %x227, <16 x i32> <i32 1, i32 3, i32 17, i32 19
@@ -126,15 +121,10 @@ define <16 x i32> @hadd_16_3(<16 x i32> %x225, <16 x i32> %x227) {
}
define <16 x float> @fhadd_16_3(<16 x float> %x225, <16 x float> %x227) {
-; KNL-LABEL: fhadd_16_3:
-; KNL: # %bb.0:
-; KNL-NEXT: vhaddps %ymm1, %ymm0, %ymm0
-; KNL-NEXT: retq
-;
-; SKX-LABEL: fhadd_16_3:
-; SKX: # %bb.0:
-; SKX-NEXT: vhaddps %ymm1, %ymm0, %ymm0
-; SKX-NEXT: retq
+; CHECK-LABEL: fhadd_16_3:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vhaddps %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: retq
%x226 = shufflevector <16 x float> %x225, <16 x float> %x227, <16 x i32> <i32 0, i32 2, i32 16, i32 18
, i32 4, i32 6, i32 20, i32 22, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%x228 = shufflevector <16 x float> %x225, <16 x float> %x227, <16 x i32> <i32 1, i32 3, i32 17, i32 19
@@ -144,15 +134,10 @@ define <16 x float> @fhadd_16_3(<16 x float> %x225, <16 x float> %x227) {
}
define <8 x double> @fhadd_16_4(<8 x double> %x225, <8 x double> %x227) {
-; KNL-LABEL: fhadd_16_4:
-; KNL: # %bb.0:
-; KNL-NEXT: vhaddpd %ymm1, %ymm0, %ymm0
-; KNL-NEXT: retq
-;
-; SKX-LABEL: fhadd_16_4:
-; SKX: # %bb.0:
-; SKX-NEXT: vhaddpd %ymm1, %ymm0, %ymm0
-; SKX-NEXT: retq
+; CHECK-LABEL: fhadd_16_4:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vhaddpd %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: retq
%x226 = shufflevector <8 x double> %x225, <8 x double> %x227, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 undef, i32 undef, i32 undef, i32 undef>
%x228 = shufflevector <8 x double> %x225, <8 x double> %x227, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 undef ,i32 undef, i32 undef, i32 undef>
%x229 = fadd <8 x double> %x226, %x228
@@ -160,15 +145,10 @@ define <8 x double> @fhadd_16_4(<8 x double> %x225, <8 x double> %x227) {
}
define <4 x double> @fadd_noundef_low(<8 x double> %x225, <8 x double> %x227) {
-; KNL-LABEL: fadd_noundef_low:
-; KNL: # %bb.0:
-; KNL-NEXT: vhaddpd %ymm1, %ymm0, %ymm0
-; KNL-NEXT: retq
-;
-; SKX-LABEL: fadd_noundef_low:
-; SKX: # %bb.0:
-; SKX-NEXT: vhaddpd %ymm1, %ymm0, %ymm0
-; SKX-NEXT: retq
+; CHECK-LABEL: fadd_noundef_low:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vhaddpd %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: retq
%x226 = shufflevector <8 x double> %x225, <8 x double> %x227, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
%x228 = shufflevector <8 x double> %x225, <8 x double> %x227, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5 ,i32 13, i32 7, i32 15>
%x229 = fadd <8 x double> %x226, %x228
@@ -177,23 +157,14 @@ define <4 x double> @fadd_noundef_low(<8 x double> %x225, <8 x double> %x227) {
}
define <4 x double> @fadd_noundef_high(<8 x double> %x225, <8 x double> %x227) {
-; KNL-LABEL: fadd_noundef_high:
-; KNL: # %bb.0:
-; KNL-NEXT: vunpcklpd {{.*#+}} zmm2 = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
-; KNL-NEXT: vunpckhpd {{.*#+}} zmm0 = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
-; KNL-NEXT: vextractf64x4 $1, %zmm0, %ymm0
-; KNL-NEXT: vextractf64x4 $1, %zmm2, %ymm1
-; KNL-NEXT: vaddpd %ymm0, %ymm1, %ymm0
-; KNL-NEXT: retq
-;
-; SKX-LABEL: fadd_noundef_high:
-; SKX: # %bb.0:
-; SKX-NEXT: vunpcklpd {{.*#+}} zmm2 = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
-; SKX-NEXT: vunpckhpd {{.*#+}} zmm0 = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
-; SKX-NEXT: vextractf64x4 $1, %zmm0, %ymm0
-; SKX-NEXT: vextractf64x4 $1, %zmm2, %ymm1
-; SKX-NEXT: vaddpd %ymm0, %ymm1, %ymm0
-; SKX-NEXT: retq
+; CHECK-LABEL: fadd_noundef_high:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vunpcklpd {{.*#+}} zmm2 = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
+; CHECK-NEXT: vunpckhpd {{.*#+}} zmm0 = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
+; CHECK-NEXT: vextractf64x4 $1, %zmm0, %ymm0
+; CHECK-NEXT: vextractf64x4 $1, %zmm2, %ymm1
+; CHECK-NEXT: vaddpd %ymm0, %ymm1, %ymm0
+; CHECK-NEXT: retq
%x226 = shufflevector <8 x double> %x225, <8 x double> %x227, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
%x228 = shufflevector <8 x double> %x225, <8 x double> %x227, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5 ,i32 13, i32 7, i32 15>
%x229 = fadd <8 x double> %x226, %x228
@@ -203,15 +174,10 @@ define <4 x double> @fadd_noundef_high(<8 x double> %x225, <8 x double> %x227) {
define <8 x i32> @hadd_16_3_sv(<16 x i32> %x225, <16 x i32> %x227) {
-; KNL-LABEL: hadd_16_3_sv:
-; KNL: # %bb.0:
-; KNL-NEXT: vphaddd %ymm1, %ymm0, %ymm0
-; KNL-NEXT: retq
-;
-; SKX-LABEL: hadd_16_3_sv:
-; SKX: # %bb.0:
-; SKX-NEXT: vphaddd %ymm1, %ymm0, %ymm0
-; SKX-NEXT: retq
+; CHECK-LABEL: hadd_16_3_sv:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm0
+; CHECK-NEXT: retq
%x226 = shufflevector <16 x i32> %x225, <16 x i32> %x227, <16 x i32> <i32 0, i32 2, i32 16, i32 18
, i32 4, i32 6, i32 20, i32 22, i32 8, i32 10, i32 24, i32 26, i32 12, i32 14, i32 28, i32 30>
%x228 = shufflevector <16 x i32> %x225, <16 x i32> %x227, <16 x i32> <i32 1, i32 3, i32 17, i32 19
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