[PATCH] D82463: [AMDGPU] Spill more than wavesize CSR SGPRs

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp:312
+    // required.
+    if (VGPRIndex == 0 && (!FuncInfo->VGPRReservedForSGPRSpill ||
+                           NumVGPRSpillLanes >= WaveSize)) {
----------------
I think it might be clearer to split out the logic for the special reserved case.

Could you do something like

```

if (FuncInfo->VGPRReservedForSGPRSpill && NumVGPRSpillLanes <= WaveSize) {
  assert(VGPRResevedForSGPRSpill == SpillVGPRs.back().VGPR);
  LaneVGPR = VGPRResevedForSGPRSpill;
} else (VGPRIndex == 0) {
 ....
} else {
  LaneVGPR = SpillVGPRs.back().VGPR
}
```


================
Comment at: llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll:10-11
+define void @spill_more_than_wavesize_csr_sgprs() {
+  %alloca = alloca i32, align 4, addrspace(5)
+  store volatile i32 0, i32 addrspace(5)* %alloca
+  call void asm sideeffect "",
----------------
I'm pretty sure this isn't broken if you do not have a stack object, but these should be unrelated so I think something is still wrong here


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82463/new/

https://reviews.llvm.org/D82463