[PATCH] D82194: [AMDGPU] Enable compare operations to be selected by divergence

Alexander via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 24 01:02:14 PDT 2020


alex-t marked an inline comment as done.
alex-t added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:6169-6170
     // Check if SCC is used first.
-    if (MI.findRegisterUseOperandIdx(AMDGPU::SCC, false, &RI) != -1) {
+    int SCCIdx = MI.findRegisterUseOperandIdx(AMDGPU::SCC, false, &RI);
+    if (SCCIdx != -1) {
       if (MI.isCopy()) {
----------------
arsenm wrote:
> MI.readsRegister(SCC)? I also think this would break if we ever bothered to use the feature of directly using scc in instruction operands
MI.readsRegister(SCC) does not fit because I need the exact operand index later on.


```
      if (NewCond.isValid())
          MI.getOperand(SCCIdx).setReg(NewCond);
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82194/new/

https://reviews.llvm.org/D82194





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