[PATCH] D81488: [MSP430] Enable some basic support for debug information

Anatoly Trosinenko via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 20 02:05:08 PDT 2020


atrosinenko added a comment.

In D81488#2104502 <https://reviews.llvm.org/D81488#2104502>, @aprantl wrote:

> > Meanwhile, is it acceptable that byte-sized and word-sized registers share the same DWARF register numbers such as r12 (16 bit) and r12b (8 bit) in this example?
>
> These kinds of decisions are supposed to be specified by the ABI document for the platform (not in the DWARF standard), so you'd have to direct this question to whatever consortium defines the ABI for MSP430.


Thank you for the explanation! The MSP430 EABI <http://www.ti.com/lit/an/slaa534/slaa534.pdf> document released in 2013, part "10.1 DWARF Register Names", mentions R0-R15 register numbers only. Recent msp430-gcc v8.3.1 does recognize

  cpp
  char g(void) {
    register char y asm("r6");
    return y;
  }

but does not recognize `asm("r6b")`. So, maybe `R*B` are more of LLVM internal abstractions.


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