[PATCH] D81908: [MIPS] Fix incorrect relocations of instruction

Fangrui Song via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 16 22:23:31 PDT 2020


MaskRay added a comment.

Rigid:

  % llvm-mc -triple=ppc64 <<< 'or 3, 3, start; start:'
  ...
  <stdin>:1:10: error: invalid operand for instruction
  % powerpc64le-linux-gnu-as <<< 'or 3, 3, start; start:'
  {standard input}: Assembler messages:
  {standard input}:1: Error: unsupported relocation against .text

Permissive:

  % aarch64-linux-gnu-as <<< 'orr w3, w3, start; start:'
  % mipsel-linux-gnu-as <<< 'ori $3, $3, start; start:' # succeeded
  % llvm-objdump -dr
  ...
         0: 04 00 63 34   ori     $3, $3, 4 <start>
                          00000000:  R_MIPS_LO16  .text
  % mips64el-linux-gnuabi64-as <<< 'ori $3, $3, start; start:'  # succeeded
  % llvm-objdump -dr
  ...
         0: 00 00 63 34   ori     $3, $3, 0 <.text>
                  0000000000000000:  R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE  .text+0x4

powerpc's behavior is definitely correct. AArch64 and MIPS's permissive behaviors are not good. A symbolic value (which can be 32-bit/64-bit) requires more bits than the immediate bits. I think flagging the instruction in the case of a symbolic value is fine.



================
Comment at: llvm/test/MC/Mips/reloc-implicit-constraints-error.s:10
+  ori  $4, $4, start            # CHECK: [[@LINE]]:{{[0-9]+}}: error: should use explicit constraints
+  ori  $4, $4, (start - .)      # CHECK: [[@LINE]]:{{[0-9]+}}: error: should use explicit constraints
+
----------------
`ori  $4, $4, (start - .)` should probably be accepted. `start - .` computes to a representable constant.


Repository:
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  https://reviews.llvm.org/D81908/new/

https://reviews.llvm.org/D81908





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