[PATCH] D81576: AMDGPU/GlobalISel: Fix some legalization of < dword vector stores

[Matt Arsenault via Phabricator via llvm-commits]

arsenm marked an inline comment as done.
arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:125
       // <2 x s8> -> s16
-      assert(Size == 16);
-      CoercedTy = LLT::scalar(16);
+      // <4 x s8> -> s32
+      CoercedTy = LLT::scalar(Size);
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foad wrote:
> This comment doesn't make sense given the `Size < 32` condition two lines above.
Well, this is what you get for <4 x s8> if it were to go down either path


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81576/new/

https://reviews.llvm.org/D81576