[llvm] ffe8f6d - [ARM][MachineOutliner] Fix no-lr-save testcase.

Yvan Roux via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 15 07:10:01 PDT 2020


Author: Yvan Roux
Date: 2020-06-15T16:09:31+02:00
New Revision: ffe8f6d33bccd272346099be260f1a0528bab061

URL: https://github.com/llvm/llvm-project/commit/ffe8f6d33bccd272346099be260f1a0528bab061
DIFF: https://github.com/llvm/llvm-project/commit/ffe8f6d33bccd272346099be260f1a0528bab061.diff

LOG: [ARM][MachineOutliner] Fix no-lr-save testcase.

Now that saving LR into a register is handled, some register constraints
are needed to keep machine-outliner-no-lr-save.mir meaningful.

Added: 
    

Modified: 
    llvm/test/CodeGen/ARM/machine-outliner-no-lr-save.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/ARM/machine-outliner-no-lr-save.mir b/llvm/test/CodeGen/ARM/machine-outliner-no-lr-save.mir
index 950172e8ff6d..678633dd8345 100644
--- a/llvm/test/CodeGen/ARM/machine-outliner-no-lr-save.mir
+++ b/llvm/test/CodeGen/ARM/machine-outliner-no-lr-save.mir
@@ -118,6 +118,7 @@ body:             |
     $r4 = t2MOVi 3, 14, $noreg, $noreg
     tBL 14, $noreg, @foo
   bb.2:
+    liveins: $lr, $r0, $r6, $r7, $r8, $r9, $r10, $r11
     tBX_RET 14, $noreg
 
   ; CHECK-LABEL: name: OUTLINED_FUNCTION_0


        


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