[PATCH] D81711: [SDAG] Add new AssertAlign ISD node.

[Michael Liao via Phabricator via llvm-commits]

hliao created this revision.
hliao added reviewers: arsenm, bogner.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, tpr, nhaehnle, wdng, jvesely.
Herald added a project: LLVM.

- AssertAlign node records the guaranteed alignment on its source node, where these alignments are retrieved from alignment attributes in LLVM IR. These tracked alignments could help DAG combining and lowering generating efficient code.
- In this patch, the basic support of AssertAlign node is added. So far, we only generate AssertAlign nodes on return values from intrinsic calls.
- Addressing selection in AMDGPU is revised accordingly to capture the new (base + offset) patterns.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D81711

Files:
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/Target/TargetSelectionDAG.td
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll

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