[PATCH] D81506: [X86] Automatically harden inline assembly RET instructions against Load Value Injection (LVI)

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3199
+                                          /*BaseReg=*/Basereg, /*IndexReg=*/0,
+                                          /*Scale=*/1, SMLoc{}, SMLoc{}, 0);
+    ShlInst.setOpcode(X86::SHL64mi);
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mattdr wrote:
> Seems like this will have implications for debugging. Can we copy the SMLoc from the original instruction, for this and for the other MCInsts we're creating?
You mean like debugging in GDB?

SMLoc is just the pointer into the memory buffer that holds the assembly text. It has no effect on debug locations in the final binary. It's main use is to print diagnostics in the compiler.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81506/new/

https://reviews.llvm.org/D81506