[llvm] 34fef0c - [VE] Support convert instructions in MC layer
Simon Moll via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 10 03:22:52 PDT 2020
Author: Kazushi (Jam) Marukawa
Date: 2020-06-10T12:22:33+02:00
New Revision: 34fef0c980446c3ea9595328e0e525db222870f0
URL: https://github.com/llvm/llvm-project/commit/34fef0c980446c3ea9595328e0e525db222870f0
DIFF: https://github.com/llvm/llvm-project/commit/34fef0c980446c3ea9595328e0e525db222870f0.diff
LOG: [VE] Support convert instructions in MC layer
Summary:
Add CVTSQ/CVTDQ/CVTQD/CVTQS instructions. Add regression tests for
them and other convert instructions of asmparser, mccodeemitter, and
disassembler. In order to add those instructions, support RD operands
in asmparser, mccodeemitter, and disassembler.
Differential Revision: https://reviews.llvm.org/D81536
Added:
llvm/test/MC/VE/CVTDL.s
llvm/test/MC/VE/CVTDQ.s
llvm/test/MC/VE/CVTDS.s
llvm/test/MC/VE/CVTDW.s
llvm/test/MC/VE/CVTLD.s
llvm/test/MC/VE/CVTQD.s
llvm/test/MC/VE/CVTQS.s
llvm/test/MC/VE/CVTSD.s
llvm/test/MC/VE/CVTSQ.s
llvm/test/MC/VE/CVTSW.s
llvm/test/MC/VE/CVTWD.s
llvm/test/MC/VE/CVTWS.s
Modified:
llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
llvm/lib/Target/VE/VE.h
llvm/lib/Target/VE/VEInstrInfo.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp b/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
index 9af3d9b9cda6..dcdcef606d5c 100644
--- a/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
+++ b/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
@@ -69,6 +69,7 @@ class VEAsmParser : public MCTargetAsmParser {
OperandMatchResultTy parseMEMOperand(OperandVector &Operands);
OperandMatchResultTy parseMEMAsOperand(OperandVector &Operands);
OperandMatchResultTy parseCCOpOperand(OperandVector &Operands);
+ OperandMatchResultTy parseRDOpOperand(OperandVector &Operands);
OperandMatchResultTy parseMImmOperand(OperandVector &Operands);
OperandMatchResultTy parseOperand(OperandVector &Operands, StringRef Name);
OperandMatchResultTy parseVEAsmOperand(std::unique_ptr<VEOperand> &Operand);
@@ -147,6 +148,7 @@ class VEOperand : public MCParsedAsmOperand {
k_MemoryZeroImm, // base=0, disp=imm
// Other special cases for Aurora VE
k_CCOp, // condition code
+ k_RDOp, // rounding mode
k_MImmOp, // Special immediate value of sequential bit stream of 0 or 1.
} Kind;
@@ -176,6 +178,10 @@ class VEOperand : public MCParsedAsmOperand {
unsigned CCVal;
};
+ struct RDOp {
+ unsigned RDVal;
+ };
+
struct MImmOp {
const MCExpr *Val;
bool M0Flag;
@@ -187,6 +193,7 @@ class VEOperand : public MCParsedAsmOperand {
struct ImmOp Imm;
struct MemOp Mem;
struct CCOp CC;
+ struct RDOp RD;
struct MImmOp MImm;
};
@@ -207,6 +214,7 @@ class VEOperand : public MCParsedAsmOperand {
bool isMEMri() const { return Kind == k_MemoryRegImm; }
bool isMEMzi() const { return Kind == k_MemoryZeroImm; }
bool isCCOp() const { return Kind == k_CCOp; }
+ bool isRDOp() const { return Kind == k_RDOp; }
bool isZero() {
if (!isImm())
return false;
@@ -362,6 +370,11 @@ class VEOperand : public MCParsedAsmOperand {
return CC.CCVal;
}
+ unsigned getRDVal() const {
+ assert((Kind == k_RDOp) && "Invalid access!");
+ return RD.RDVal;
+ }
+
const MCExpr *getMImmVal() const {
assert((Kind == k_MImmOp) && "Invalid access!");
return MImm.Val;
@@ -416,6 +429,9 @@ class VEOperand : public MCParsedAsmOperand {
case k_CCOp:
OS << "CCOp: " << getCCVal() << "\n";
break;
+ case k_RDOp:
+ OS << "RDOp: " << getRDVal() << "\n";
+ break;
case k_MImmOp:
OS << "MImm: (" << getMImmVal() << (getM0Flag() ? ")0" : ")1") << "\n";
break;
@@ -460,6 +476,7 @@ class VEOperand : public MCParsedAsmOperand {
void addUImm7Operands(MCInst &Inst, unsigned N) const {
addImmOperands(Inst, N);
}
+
void addSImm7Operands(MCInst &Inst, unsigned N) const {
addImmOperands(Inst, N);
}
@@ -526,6 +543,12 @@ class VEOperand : public MCParsedAsmOperand {
Inst.addOperand(MCOperand::createImm(getCCVal()));
}
+ void addRDOpOperands(MCInst &Inst, unsigned N) const {
+ assert(N == 1 && "Invalid number of operands!");
+
+ Inst.addOperand(MCOperand::createImm(getRDVal()));
+ }
+
void addMImmOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
const auto *ConstExpr = dyn_cast<MCConstantExpr>(getMImmVal());
@@ -572,6 +595,15 @@ class VEOperand : public MCParsedAsmOperand {
return Op;
}
+ static std::unique_ptr<VEOperand> CreateRDOp(unsigned RDVal, SMLoc S,
+ SMLoc E) {
+ auto Op = std::make_unique<VEOperand>(k_RDOp);
+ Op->RD.RDVal = RDVal;
+ Op->StartLoc = S;
+ Op->EndLoc = E;
+ return Op;
+ }
+
static std::unique_ptr<VEOperand> CreateMImm(const MCExpr *Val, bool Flag,
SMLoc S, SMLoc E) {
auto Op = std::make_unique<VEOperand>(k_MImmOp);
@@ -810,6 +842,30 @@ static StringRef parseCC(StringRef Name, unsigned Prefix, unsigned Suffix,
return Name;
}
+static StringRef parseRD(StringRef Name, unsigned Prefix, SMLoc NameLoc,
+ OperandVector *Operands) {
+ // Parse instructions with a conditional code. For example, 'cvt.w.d.sx.rz'
+ // is converted into two operands 'cvt.w.d.sx' and '.rz'.
+ StringRef RD = Name.substr(Prefix);
+ VERD::RoundingMode RoundingMode = stringToVERD(RD);
+
+ if (RoundingMode != VERD::UNKNOWN) {
+ Name = Name.slice(0, Prefix);
+ // push 1st like `cvt.w.d.sx`
+ Operands->push_back(VEOperand::CreateToken(Name, NameLoc));
+ SMLoc SuffixLoc =
+ SMLoc::getFromPointer(NameLoc.getPointer() + (RD.data() - Name.data()));
+ SMLoc SuffixEnd =
+ SMLoc::getFromPointer(NameLoc.getPointer() + (RD.end() - Name.data()));
+ // push $round if it has rounding mode
+ Operands->push_back(
+ VEOperand::CreateRDOp(RoundingMode, SuffixLoc, SuffixEnd));
+ } else {
+ Operands->push_back(VEOperand::CreateToken(Name, NameLoc));
+ }
+ return Name;
+}
+
// Split the mnemonic into ASM operand, conditional code and instruction
// qualifier (half-word, byte).
StringRef VEAsmParser::splitMnemonic(StringRef Name, SMLoc NameLoc,
@@ -834,6 +890,11 @@ StringRef VEAsmParser::splitMnemonic(StringRef Name, SMLoc NameLoc,
Name.startswith("cmov.d.") || Name.startswith("cmov.s.")) {
bool ICC = Name[5] == 'l' || Name[5] == 'w';
Mnemonic = parseCC(Name, 7, Name.size(), ICC, false, NameLoc, Operands);
+ } else if (Name.startswith("cvt.w.d.sx") || Name.startswith("cvt.w.d.zx") ||
+ Name.startswith("cvt.w.s.sx") || Name.startswith("cvt.w.s.zx")) {
+ Mnemonic = parseRD(Name, 10, NameLoc, Operands);
+ } else if (Name.startswith("cvt.l.d")) {
+ Mnemonic = parseRD(Name, 7, NameLoc, Operands);
} else {
Operands->push_back(VEOperand::CreateToken(Mnemonic, NameLoc));
}
diff --git a/llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp b/llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
index eecace0d02b1..6524cd12a9f9 100644
--- a/llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
+++ b/llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
@@ -189,6 +189,8 @@ static DecodeStatus DecodeSIMM7(MCInst &Inst, uint64_t insn, uint64_t Address,
const void *Decoder);
static DecodeStatus DecodeCCOperand(MCInst &Inst, uint64_t insn,
uint64_t Address, const void *Decoder);
+static DecodeStatus DecodeRDOperand(MCInst &Inst, uint64_t insn,
+ uint64_t Address, const void *Decoder);
static DecodeStatus DecodeBranchCondition(MCInst &Inst, uint64_t insn,
uint64_t Address,
const void *Decoder);
@@ -509,6 +511,13 @@ static DecodeStatus DecodeCCOperand(MCInst &MI, uint64_t cf, uint64_t Address,
return MCDisassembler::Success;
}
+// Decode RD Operand field.
+static DecodeStatus DecodeRDOperand(MCInst &MI, uint64_t cf, uint64_t Address,
+ const void *Decoder) {
+ MI.addOperand(MCOperand::createImm(VEValToRD(cf)));
+ return MCDisassembler::Success;
+}
+
// Decode branch condition instruction and CCOperand field in it.
static DecodeStatus DecodeBranchCondition(MCInst &MI, uint64_t insn,
uint64_t Address,
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
index c32f5564bb90..523210a4183e 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
@@ -68,6 +68,9 @@ class VEMCCodeEmitter : public MCCodeEmitter {
uint64_t getCCOpValue(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
+ uint64_t getRDOpValue(const MCInst &MI, unsigned OpNo,
+ SmallVectorImpl<MCFixup> &Fixups,
+ const MCSubtargetInfo &STI) const;
private:
FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) const;
@@ -126,6 +129,16 @@ uint64_t VEMCCodeEmitter::getCCOpValue(const MCInst &MI, unsigned OpNo,
return 0;
}
+uint64_t VEMCCodeEmitter::getRDOpValue(const MCInst &MI, unsigned OpNo,
+ SmallVectorImpl<MCFixup> &Fixups,
+ const MCSubtargetInfo &STI) const {
+ const MCOperand &MO = MI.getOperand(OpNo);
+ if (MO.isImm())
+ return VERDToVal(static_cast<VERD::RoundingMode>(
+ getMachineOpValue(MI, MO, Fixups, STI)));
+ return 0;
+}
+
#define ENABLE_INSTR_PREDICATE_VERIFIER
#include "VEGenMCCodeEmitter.inc"
diff --git a/llvm/lib/Target/VE/VE.h b/llvm/lib/Target/VE/VE.h
index 960a04355b96..7ed7797cbb83 100644
--- a/llvm/lib/Target/VE/VE.h
+++ b/llvm/lib/Target/VE/VE.h
@@ -275,6 +275,52 @@ inline static const char *VERDToString(VERD::RoundingMode R) {
}
}
+inline static VERD::RoundingMode stringToVERD(StringRef S) {
+ return StringSwitch<VERD::RoundingMode>(S)
+ .Case("", VERD::RD_NONE)
+ .Case(".rz", VERD::RD_RZ)
+ .Case(".rp", VERD::RD_RP)
+ .Case(".rm", VERD::RD_RM)
+ .Case(".rn", VERD::RD_RN)
+ .Case(".ra", VERD::RD_RA)
+ .Default(VERD::UNKNOWN);
+}
+
+inline static unsigned VERDToVal(VERD::RoundingMode R) {
+ switch (R) {
+ case VERD::RD_NONE:
+ case VERD::RD_RZ:
+ case VERD::RD_RP:
+ case VERD::RD_RM:
+ case VERD::RD_RN:
+ case VERD::RD_RA:
+ return static_cast<unsigned>(R);
+ default:
+ break;
+ }
+ llvm_unreachable("Invalid branch predicates");
+}
+
+inline static VERD::RoundingMode VEValToRD(unsigned Val) {
+ switch (Val) {
+ case static_cast<unsigned>(VERD::RD_NONE):
+ return VERD::RD_NONE;
+ case static_cast<unsigned>(VERD::RD_RZ):
+ return VERD::RD_RZ;
+ case static_cast<unsigned>(VERD::RD_RP):
+ return VERD::RD_RP;
+ case static_cast<unsigned>(VERD::RD_RM):
+ return VERD::RD_RM;
+ case static_cast<unsigned>(VERD::RD_RN):
+ return VERD::RD_RN;
+ case static_cast<unsigned>(VERD::RD_RA):
+ return VERD::RD_RA;
+ default:
+ break;
+ }
+ llvm_unreachable("Invalid branch predicates");
+}
+
// MImm - Special immediate value of sequential bit stream of 0 or 1.
// See VEInstrInfo.td for details.
inline static bool isMImmVal(uint64_t Val) {
diff --git a/llvm/lib/Target/VE/VEInstrInfo.td b/llvm/lib/Target/VE/VEInstrInfo.td
index 114a6a95220f..f0850d97c2a4 100644
--- a/llvm/lib/Target/VE/VEInstrInfo.td
+++ b/llvm/lib/Target/VE/VEInstrInfo.td
@@ -396,9 +396,15 @@ def CCOp : Operand<i32>, ImmLeaf<i32, [{
let ParserMatchClass = CCOpAsmOperand;
}
-// Operand for printing out a rounding mode code.
+// Operand for a rounding mode code.
+def RDOpAsmOperand : AsmOperandClass {
+ let Name = "RDOp";
+}
def RDOp : Operand<i32> {
let PrintMethod = "printRDOperand";
+ let DecoderMethod = "DecodeRDOperand";
+ let EncoderMethod = "getRDOpValue";
+ let ParserMatchClass = RDOpAsmOperand;
}
def VEhi : SDNode<"VEISD::Hi", SDTIntUnaryOp>;
@@ -1333,11 +1339,18 @@ defm CVTDL : CVTm<"cvt.d.l", 0x5F, I64, f64, I64, i64, sint_to_fp>;
// Section 8.7.15 - CVS (Convert to Single-format)
defm CVTSD : CVTm<"cvt.s.d", 0x1F, F32, f32, I64, f64, fpround>;
+let cx = 1 in
+defm CVTSQ : CVTm<"cvt.s.q", 0x1F, F32, f32, F128, f128>;
// Section 8.7.16 - CVD (Convert to Double-format)
defm CVTDS : CVTm<"cvt.d.s", 0x0F, I64, f64, F32, f32, fpextend>;
+let cx = 1 in
+defm CVTDQ : CVTm<"cvt.d.q", 0x0F, I64, f64, F128, f128>;
// Section 8.7.17 - CVQ (Convert to Single-format)
+defm CVTQD : CVTm<"cvt.q.d", 0x2D, F128, f128, I64, f64>;
+let cx = 1 in
+defm CVTQS : CVTm<"cvt.q.s", 0x2D, F128, f128, F32, f32>;
//-----------------------------------------------------------------------------
// Section 8.8 - Branch instructions
diff --git a/llvm/test/MC/VE/CVTDL.s b/llvm/test/MC/VE/CVTDL.s
new file mode 100644
index 000000000000..4fbb19dccee4
--- /dev/null
+++ b/llvm/test/MC/VE/CVTDL.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.d.l %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x0b,0x5f]
+cvt.d.l %s11, %s12
+
+# CHECK-INST: cvt.d.l %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x0b,0x5f]
+cvt.d.l %s11, 63
+
+# CHECK-INST: cvt.d.l %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x0b,0x5f]
+cvt.d.l %s11, -64
+
+# CHECK-INST: cvt.d.l %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x0b,0x5f]
+cvt.d.l %s11, -1
diff --git a/llvm/test/MC/VE/CVTDQ.s b/llvm/test/MC/VE/CVTDQ.s
new file mode 100644
index 000000000000..0022ae875d5e
--- /dev/null
+++ b/llvm/test/MC/VE/CVTDQ.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.d.q %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x8b,0x0f]
+cvt.d.q %s11, %s12
+
+# CHECK-INST: cvt.d.q %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x8b,0x0f]
+cvt.d.q %s11, 63
+
+# CHECK-INST: cvt.d.q %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x8b,0x0f]
+cvt.d.q %s11, -64
+
+# CHECK-INST: cvt.d.q %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x8b,0x0f]
+cvt.d.q %s11, -1
diff --git a/llvm/test/MC/VE/CVTDS.s b/llvm/test/MC/VE/CVTDS.s
new file mode 100644
index 000000000000..ba5f008d539e
--- /dev/null
+++ b/llvm/test/MC/VE/CVTDS.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.d.s %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x0b,0x0f]
+cvt.d.s %s11, %s12
+
+# CHECK-INST: cvt.d.s %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x0b,0x0f]
+cvt.d.s %s11, 63
+
+# CHECK-INST: cvt.d.s %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x0b,0x0f]
+cvt.d.s %s11, -64
+
+# CHECK-INST: cvt.d.s %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x0b,0x0f]
+cvt.d.s %s11, -1
diff --git a/llvm/test/MC/VE/CVTDW.s b/llvm/test/MC/VE/CVTDW.s
new file mode 100644
index 000000000000..9958acbaf43f
--- /dev/null
+++ b/llvm/test/MC/VE/CVTDW.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.d.w %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x0b,0x5e]
+cvt.d.w %s11, %s12
+
+# CHECK-INST: cvt.d.w %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x0b,0x5e]
+cvt.d.w %s11, 63
+
+# CHECK-INST: cvt.d.w %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x0b,0x5e]
+cvt.d.w %s11, -64
+
+# CHECK-INST: cvt.d.w %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x0b,0x5e]
+cvt.d.w %s11, -1
diff --git a/llvm/test/MC/VE/CVTLD.s b/llvm/test/MC/VE/CVTLD.s
new file mode 100644
index 000000000000..cca10de9b756
--- /dev/null
+++ b/llvm/test/MC/VE/CVTLD.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.l.d %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x0b,0x4f]
+cvt.l.d %s11, %s12
+
+# CHECK-INST: cvt.l.d.rz %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x08,0x3f,0x0b,0x4f]
+cvt.l.d.rz %s11, 63
+
+# CHECK-INST: cvt.l.d.rp %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x09,0x40,0x0b,0x4f]
+cvt.l.d.rp %s11, -64
+
+# CHECK-INST: cvt.l.d.rm %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x0a,0x7f,0x0b,0x4f]
+cvt.l.d.rm %s11, -1
+
+# CHECK-INST: cvt.l.d.rn %s11, 7
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x0b,0x07,0x0b,0x4f]
+cvt.l.d.rn %s11, 7
+
+# CHECK-INST: cvt.l.d.ra %s11, %s63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x0c,0xbf,0x0b,0x4f]
+cvt.l.d.ra %s11, %s63
diff --git a/llvm/test/MC/VE/CVTQD.s b/llvm/test/MC/VE/CVTQD.s
new file mode 100644
index 000000000000..1ca8e2791c2b
--- /dev/null
+++ b/llvm/test/MC/VE/CVTQD.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.q.d %s18, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x12,0x2d]
+cvt.q.d %s18, %s12
+
+# CHECK-INST: cvt.q.d %s18, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x12,0x2d]
+cvt.q.d %s18, 63
+
+# CHECK-INST: cvt.q.d %s18, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x12,0x2d]
+cvt.q.d %s18, -64
+
+# CHECK-INST: cvt.q.d %s18, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x12,0x2d]
+cvt.q.d %s18, -1
diff --git a/llvm/test/MC/VE/CVTQS.s b/llvm/test/MC/VE/CVTQS.s
new file mode 100644
index 000000000000..cb939a20047f
--- /dev/null
+++ b/llvm/test/MC/VE/CVTQS.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.q.s %s18, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x92,0x2d]
+cvt.q.s %s18, %s12
+
+# CHECK-INST: cvt.q.s %s18, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x92,0x2d]
+cvt.q.s %s18, 63
+
+# CHECK-INST: cvt.q.s %s18, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x92,0x2d]
+cvt.q.s %s18, -64
+
+# CHECK-INST: cvt.q.s %s18, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x92,0x2d]
+cvt.q.s %s18, -1
diff --git a/llvm/test/MC/VE/CVTSD.s b/llvm/test/MC/VE/CVTSD.s
new file mode 100644
index 000000000000..2a38e10c2b78
--- /dev/null
+++ b/llvm/test/MC/VE/CVTSD.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.s.d %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x0b,0x1f]
+cvt.s.d %s11, %s12
+
+# CHECK-INST: cvt.s.d %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x0b,0x1f]
+cvt.s.d %s11, 63
+
+# CHECK-INST: cvt.s.d %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x0b,0x1f]
+cvt.s.d %s11, -64
+
+# CHECK-INST: cvt.s.d %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x0b,0x1f]
+cvt.s.d %s11, -1
diff --git a/llvm/test/MC/VE/CVTSQ.s b/llvm/test/MC/VE/CVTSQ.s
new file mode 100644
index 000000000000..84aab3ae5e07
--- /dev/null
+++ b/llvm/test/MC/VE/CVTSQ.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.s.q %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x8b,0x1f]
+cvt.s.q %s11, %s12
+
+# CHECK-INST: cvt.s.q %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x8b,0x1f]
+cvt.s.q %s11, 63
+
+# CHECK-INST: cvt.s.q %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x8b,0x1f]
+cvt.s.q %s11, -64
+
+# CHECK-INST: cvt.s.q %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x8b,0x1f]
+cvt.s.q %s11, -1
diff --git a/llvm/test/MC/VE/CVTSW.s b/llvm/test/MC/VE/CVTSW.s
new file mode 100644
index 000000000000..876b70823387
--- /dev/null
+++ b/llvm/test/MC/VE/CVTSW.s
@@ -0,0 +1,20 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.s.w %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x8b,0x5e]
+cvt.s.w %s11, %s12
+
+# CHECK-INST: cvt.s.w %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x8b,0x5e]
+cvt.s.w %s11, 63
+
+# CHECK-INST: cvt.s.w %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x8b,0x5e]
+cvt.s.w %s11, -64
+
+# CHECK-INST: cvt.s.w %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x8b,0x5e]
+cvt.s.w %s11, -1
diff --git a/llvm/test/MC/VE/CVTWD.s b/llvm/test/MC/VE/CVTWD.s
new file mode 100644
index 000000000000..0eec7c8ec177
--- /dev/null
+++ b/llvm/test/MC/VE/CVTWD.s
@@ -0,0 +1,52 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.w.d.sx %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x0b,0x4e]
+cvt.w.d.sx %s11, %s12
+
+# CHECK-INST: cvt.w.d.sx.rz %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x08,0x3f,0x0b,0x4e]
+cvt.w.d.sx.rz %s11, 63
+
+# CHECK-INST: cvt.w.d.sx.rp %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x09,0x40,0x0b,0x4e]
+cvt.w.d.sx.rp %s11, -64
+
+# CHECK-INST: cvt.w.d.sx.rm %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x0a,0x7f,0x0b,0x4e]
+cvt.w.d.sx.rm %s11, -1
+
+# CHECK-INST: cvt.w.d.sx.rn %s11, 7
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x0b,0x07,0x0b,0x4e]
+cvt.w.d.sx.rn %s11, 7
+
+# CHECK-INST: cvt.w.d.sx.ra %s11, %s63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x0c,0xbf,0x0b,0x4e]
+cvt.w.d.sx.ra %s11, %s63
+
+# CHECK-INST: cvt.w.d.zx %s11, %s12
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x00,0x8c,0x0b,0x4e]
+cvt.w.d.zx %s11, %s12
+
+# CHECK-INST: cvt.w.d.zx.rz %s11, 63
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x08,0x3f,0x0b,0x4e]
+cvt.w.d.zx.rz %s11, 63
+
+# CHECK-INST: cvt.w.d.zx.rp %s11, -64
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x09,0x40,0x0b,0x4e]
+cvt.w.d.zx.rp %s11, -64
+
+# CHECK-INST: cvt.w.d.zx.rm %s11, -1
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x0a,0x7f,0x0b,0x4e]
+cvt.w.d.zx.rm %s11, -1
+
+# CHECK-INST: cvt.w.d.zx.rn %s11, 7
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x0b,0x07,0x0b,0x4e]
+cvt.w.d.zx.rn %s11, 7
+
+# CHECK-INST: cvt.w.d.zx.ra %s11, %s63
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x0c,0xbf,0x0b,0x4e]
+cvt.w.d.zx.ra %s11, %s63
diff --git a/llvm/test/MC/VE/CVTWS.s b/llvm/test/MC/VE/CVTWS.s
new file mode 100644
index 000000000000..d4aca32d9b2e
--- /dev/null
+++ b/llvm/test/MC/VE/CVTWS.s
@@ -0,0 +1,52 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: cvt.w.s.sx %s11, %s12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x8b,0x4e]
+cvt.w.s.sx %s11, %s12
+
+# CHECK-INST: cvt.w.s.sx.rz %s11, 63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x08,0x3f,0x8b,0x4e]
+cvt.w.s.sx.rz %s11, 63
+
+# CHECK-INST: cvt.w.s.sx.rp %s11, -64
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x09,0x40,0x8b,0x4e]
+cvt.w.s.sx.rp %s11, -64
+
+# CHECK-INST: cvt.w.s.sx.rm %s11, -1
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x0a,0x7f,0x8b,0x4e]
+cvt.w.s.sx.rm %s11, -1
+
+# CHECK-INST: cvt.w.s.sx.rn %s11, 7
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x0b,0x07,0x8b,0x4e]
+cvt.w.s.sx.rn %s11, 7
+
+# CHECK-INST: cvt.w.s.sx.ra %s11, %s63
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x0c,0xbf,0x8b,0x4e]
+cvt.w.s.sx.ra %s11, %s63
+
+# CHECK-INST: cvt.w.s.zx %s11, %s12
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x00,0x8c,0x8b,0x4e]
+cvt.w.s.zx %s11, %s12
+
+# CHECK-INST: cvt.w.s.zx.rz %s11, 63
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x08,0x3f,0x8b,0x4e]
+cvt.w.s.zx.rz %s11, 63
+
+# CHECK-INST: cvt.w.s.zx.rp %s11, -64
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x09,0x40,0x8b,0x4e]
+cvt.w.s.zx.rp %s11, -64
+
+# CHECK-INST: cvt.w.s.zx.rm %s11, -1
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x0a,0x7f,0x8b,0x4e]
+cvt.w.s.zx.rm %s11, -1
+
+# CHECK-INST: cvt.w.s.zx.rn %s11, 7
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x0b,0x07,0x8b,0x4e]
+cvt.w.s.zx.rn %s11, 7
+
+# CHECK-INST: cvt.w.s.zx.ra %s11, %s63
+# CHECK-ENCODING: encoding: [0x80,0x00,0x00,0x00,0x0c,0xbf,0x8b,0x4e]
+cvt.w.s.zx.ra %s11, %s63
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