[PATCH] D81506: [X86] Automatically harden inline assembly RET instructions against Load Value Injection (LVI)

[Scott Constable via Phabricator via llvm-commits]

sconstab created this revision.
sconstab added reviewers: craig.topper, mattdr.
Herald added subscribers: jfb, hiraditya.
Herald added a project: LLVM.

Previously, the `X86AsmParser` would issue a warning whenever a `ret` instruction is encountered. This patch changes the behavior to automatically transform each `ret` instruction in an inline assembly stream into:

  shlq $0, (%rsp)
  lfence
  ret

which is secure, according to https://software.intel.com/security-software-guidance/insights/deep-dive-load-value-injection#specialinstructions.


https://reviews.llvm.org/D81506

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/test/CodeGen/X86/lvi-hardening-inline-asm.ll

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