[PATCH] D81454: [VE] Support rest of load/store instructions in MC layer

[Kazushi Marukawa via Phabricator via llvm-commits]

kaz7 created this revision.
kaz7 added reviewers: simoll, k-ishizaka.
kaz7 added projects: LLVM, VE.
Herald added subscribers: llvm-commits, hiraditya.

Add DLD/DLDU/DLDL/PFCH/TS1AM/TS2AM/TS3AM/ATMAM/CAS instructions newly.
Add regression tests for them to asmparser, mccodeemitter, and disassembler.
In order to add those instructions, change asmparser to support UImm0to2 and
UImm1 operands, add new decode functions to disassembler, and add new print
functions to instprinter.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D81454

Files:
  llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
  llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
  llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
  llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h
  llvm/lib/Target/VE/VEInstrFormats.td
  llvm/lib/Target/VE/VEInstrInfo.td
  llvm/test/MC/VE/ATMAM.s
  llvm/test/MC/VE/CAS.s
  llvm/test/MC/VE/DLD.s
  llvm/test/MC/VE/PFCH.s
  llvm/test/MC/VE/TS1AM.s
  llvm/test/MC/VE/TS2AM.s
  llvm/test/MC/VE/TS3AM.s

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